ATMEGA128RFA1-ZU Atmel, ATMEGA128RFA1-ZU Datasheet - Page 373

• Manufacturer Part Number: ATMEGA128RFA1-ZU
• Description: IC AVR MCU 2.4GHZ XCEIVER 64QFN
• Manufacturer: Atmel
• Series: ATMEGAr

Specifications of ATMEGA128RFA1-ZU

• Frequency: 2.4GHz
• Data Rate - Maximum: 2Mbps
• Modulation Or Protocol: 802.15.4 Zigbee
• Applications: General Purpose
• Power - Output: 3.5dBm
• Sensitivity: -100dBm
• Voltage - Supply: 1.8 V ~ 3.6 V
• Current - Receiving: 12.5mA
• Current - Transmitting: 14.5mA
• Data Interface: PCB, Surface Mount
• Memory Size: 128kB Flash, 4kB EEPROM, 16kB RAM
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VFQFN, Exposed Pad
• Rf Ic Case Style: QFN
• No. Of Pins: 64
• Supply Voltage Range: 1.8V To 3.6V
• Operating Temperature Range: -40°C To +85°C
• Svhc: No SVHC (15-Dec-2010)
• Rohs Compliant: Yes
• Processor Series: ATMEGA128x
• Core: AVR8
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 128 KB
• Data Ram Size: 16 KB
• Interface Type: JTAG
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 38
• Number Of Timers: 6
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVR128RFA1-EK1
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

24.5.1 Transmitter and Receiver Flags and Interrupts
24.5.2 Disabling the Transmitter or Receiver
24.6 USART MSPIM Register Description
24.6.1 UDRn – USART MSPIM I/O Data Register
24.6.2 UBRRnL and UBRRnH – USART MSPIM Baud Rate Registers
24.6.3 UCSR0A – USART0 MSPIM Control and Status Register A
8266A-MCU Wireless-12/09
The RXCn, TXCn, and UDREn flags and corresponding interrupts in USART in MSPIM
mode are identical in function to the normal USART operation. However, the receiver
error status flags (FE, DOR, and PE) are not in use and are always read as zero.
The disabling of the transmitter or receiver in USART in MSPIM mode is identical in
function to the normal USART operation.
The following section describes the registers used for SPI operation using the USART.
The function and bit description of the USART data register (UDRn) in MSPI mode is
identical to normal USART operation. See
page
The function and bit description of the baud rate registers in MSPI mode is identical to
normal USART operation. See
page 360
Table 24–3. Comparison of USART in MSPIM mode and SPI pins
• Bit 7 – RXC0 - USART Receive Complete
This flag bit is set when there are unread data in the receive buffer and cleared when
the receive buffer is empty (i.e., does not contain any unread data). If the Receiver is
disabled, the receive buffer will be flushed and consequently the RXC0 bit will become
zero. The RXC0 Flag can be used to generate a Receive Complete interrupt (see
description of the RXCIE0 bit).
• Bit 6 – TXC0 - USART Transmit Complete
This flag bit is set when the entire frame in the Transmit Shift Register has been shifted
out and there are no new data currently present in the transmit buffer (UDR0). The
TXC0 Flag bit is automatically cleared when a transmit complete interrupt is executed,
or it can be cleared by writing a one to its bit location. The TXC0 Flag can generate a
Transmit Complete interrupt (see description of the TXCIE0 bit).
Bit
NA ($C0)
Read/Write
Initial Value
USART_MSPIM
356.
XCKn
RxDn
TxDn
(N/A)
and
RXC0
"UBRR0H – USART0 Baud Rate Register High Byte" on page
R
7
0
TXC0
RW
6
0
UDRE0
R
"UBRR0L – USART0 Baud Rate Register Low Byte" on
5
0
MOSI
MISO
SCK
SPI
SS
¯ ¯
4
"UDR0 – USART0 I/O Data Register" on
3
Not supported by USART in MSPIM
ATmega128RFA1
2
(Functional identical)
Master Out only
Master In only
Comment
1
0
360.
UCSR0A
373