ATMEGA128RFA1-ZU Atmel, ATMEGA128RFA1-ZU Datasheet - Page 388

• Manufacturer Part Number: ATMEGA128RFA1-ZU
• Description: IC AVR MCU 2.4GHZ XCEIVER 64QFN
• Manufacturer: Atmel
• Series: ATMEGAr

Specifications of ATMEGA128RFA1-ZU

• Frequency: 2.4GHz
• Data Rate - Maximum: 2Mbps
• Modulation Or Protocol: 802.15.4 Zigbee
• Applications: General Purpose
• Power - Output: 3.5dBm
• Sensitivity: -100dBm
• Voltage - Supply: 1.8 V ~ 3.6 V
• Current - Receiving: 12.5mA
• Current - Transmitting: 14.5mA
• Data Interface: PCB, Surface Mount
• Memory Size: 128kB Flash, 4kB EEPROM, 16kB RAM
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VFQFN, Exposed Pad
• Rf Ic Case Style: QFN
• No. Of Pins: 64
• Supply Voltage Range: 1.8V To 3.6V
• Operating Temperature Range: -40°C To +85°C
• Svhc: No SVHC (15-Dec-2010)
• Rohs Compliant: Yes
• Processor Series: ATMEGA128x
• Core: AVR8
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 128 KB
• Data Ram Size: 16 KB
• Interface Type: JTAG
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 38
• Number Of Timers: 6
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVR128RFA1-EK1
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

25.7.1 Master Transmitter Mode
388
ATmega128RFA1
details of the following serial transfer are given in
on
In the Master Transmitter mode, a number of data bytes are transmitted to a Slave
Receiver (see
condition must be transmitted. The format of the following address packet determines
whether Master Transmitter or Master Receiver mode is to be entered. If SLA+W is
transmitted, MT mode is entered, if SLA+R is transmitted, MR mode is entered. All
status codes mentioned in this section assume that the prescaler bits are zero or are
masked to zero.
Figure 25-11. Data Transfer in Master Transmitter Mode
SDA
SCL
A START condition is sent by writing the following value to TWCR:
TWEN must be set to enable the 2-wire Serial Interface, TWSTA must be written to one
to transmit a START condition and TWINT must be written to one to clear the TWINT
Flag. The TWI will then test the 2-wire Serial Bus and generate a START condition as
soon as the bus becomes free. After a START condition has been transmitted, the
TWINT Flag is set by hardware, and the status code in TWSR will be 0x08 (see
25-3 on
done by writing SLA+W to TWDR. Thereafter the TWINT bit should be cleared (by
writing it to one) to continue the transfer. This is accomplished by writing the following
value to TWCR:
When SLA+W have been transmitted and an acknowledgement bit has been received,
TWINT is set again and a number of status codes in TWSR are possible. Possible
status codes in Master mode are 0x18, 0x20, or 0x38. The appropriate action to be
taken for each of these status codes is detailed in
When SLA+W has been successfully transmitted, a data packet should be transmitted.
This is done by writing the data byte to TWDR. TWDR must only be written when
TWINT is high. If not, the access will be discarded, and the Write Collision bit (TWWC)
will be set in the TWCR Register. After updating TWDR, the TWINT bit should be
cleared (by writing it to one) to continue the transfer. This is accomplished by writing the
following value to TWCR:
TWCR
Value
TWCR
Value
page 398. Note that the prescaler bits are masked to zero in these tables.
page 390). In order to enter MT mode, SLA+W must be transmitted. This is
TRANSMITTER
Device 1
MASTER
TWINT
TWINT
1
1
Figure 25-11
Device 2
RECEIVER
SLAVE
TWEA
TWEA
X
X
Device 3
below). In order to enter a Master mode, a START
TWSTA
TWSTA
1
0
........
TWSTO
TWSTO
0
0
Device n
DEVDD
Table 25-3 on
Table 25-3 on
TWWC
TWWC
X
X
R1
TWEN
TWEN
R2
1
1
page 390 to
page 390.
8266A-MCU Wireless-12/09
–
0
–
0
Table 25-6
TWIE
TWIE
Table
X
X