ATMEGA128RFA1-ZU Atmel, ATMEGA128RFA1-ZU Datasheet - Page 54

• Manufacturer Part Number: ATMEGA128RFA1-ZU
• Description: IC AVR MCU 2.4GHZ XCEIVER 64QFN
• Manufacturer: Atmel
• Series: ATMEGAr

Specifications of ATMEGA128RFA1-ZU

• Frequency: 2.4GHz
• Data Rate - Maximum: 2Mbps
• Modulation Or Protocol: 802.15.4 Zigbee
• Applications: General Purpose
• Power - Output: 3.5dBm
• Sensitivity: -100dBm
• Voltage - Supply: 1.8 V ~ 3.6 V
• Current - Receiving: 12.5mA
• Current - Transmitting: 14.5mA
• Data Interface: PCB, Surface Mount
• Memory Size: 128kB Flash, 4kB EEPROM, 16kB RAM
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VFQFN, Exposed Pad
• Rf Ic Case Style: QFN
• No. Of Pins: 64
• Supply Voltage Range: 1.8V To 3.6V
• Operating Temperature Range: -40°C To +85°C
• Svhc: No SVHC (15-Dec-2010)
• Rohs Compliant: Yes
• Processor Series: ATMEGA128x
• Core: AVR8
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 128 KB
• Data Ram Size: 16 KB
• Interface Type: JTAG
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 38
• Number Of Timers: 6
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVR128RFA1-EK1
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

9.4.2.4 Frame Filtering
54
ATmega128RFA1
Note that It is not allowed to set AACK_FLTR_RES_FT = 1 and have register bit
AACK_FLTR_RES_FT set to 0.
Short Acknowledgment Frame (ACK) Start Timing
The bit AACK_ACK_TIME of register XAH_CTRL_1 defines the symbol time between
frame reception and transmission of an acknowledgment frame.
Table 9-11. Overview of RX_AACK Configuration Bits
Note that this feature can be used in all scenarios, independent of other configurations.
However, shorter acknowledgment timing is especially useful when using High Data
Rate Modes to increase battery lifetime and to improve the overall data throughput; see
"High Data Rate Modes" on page 86
Frame Filtering is an evaluation whether or not a received frame is dedicated for this
node. To accept a received frame and to generate an address match interrupt
(TRX24_AMI) a filtering procedure as described in IEEE 802.15.4-2006 chapter 7.5.6.2.
(Third level of filtering) is applied to the frame. The radio transceiver’s RX_AACK mode
accepts only frames that satisfy all of the following requirements (quote from
IEEE 802.15.4-2006, 7.5.6.2):
1. The Frame Type subfield shall not contain a reserved frame type.
2. The Frame Version subfield shall not contain a reserved value.
3. If a destination PAN identifier is included in the frame, it shall match macPANId or
4. If a short destination address is included in the frame, it shall match either
5. If the frame type indicates that the frame is a beacon frame, the source PAN
6. If only source addressing fields are included in a data or MAC command frame, the
The radio transceiver requires two additional rules:
1. The frame type indicates that the frame is not an ACK frame (refer
AACK_ACK_TIME
Register Name
shall be the broadcast PAN identifier (0xFFFF).
macShortAddress or the broadcast address (0xFFFF). Otherwise, if an extended
destination address is included in the frame, it shall match aExtendedAddress.
identifier shall match macPANId unless macPANId is equal to 0xFFFF, in which
case the beacon frame shall be accepted regardless of the source PAN identifier.
frame shall be accepted only if the device is the PAN coordinator and the source
PAN identifier matches macPANId.
page 50).
If AACK_FLT_RES_FT = 1 any frame with a reserved frame type is filtered by the
address filter similar to a data frame as described in the standard. Consequently, a
TRX24_AMI interrupt is generated upon address match. A TRX24_RX_END
interrupt is only generated if the address matched and the frame was not
corrupted. An acknowledgment is only send, when the ACK request subfield was
set in the received frame and a TRX24_RX_END interrupt occurred.
Register Bit
2
Description
0: Standard compliant acknowledgement timing of 12
symbol periods. In slotted acknowledgement operation
mode, the acknowledgment frame transmission can be
triggered 6 symbol periods after reception of the frame
earliest.
1: Reduced acknowledgment timing of 2 symbol periods
(32 µs).
for details.
8266A-MCU Wireless-12/09
toTable 9-6 on