ATMEGA128RFA1-ZU Atmel, ATMEGA128RFA1-ZU Datasheet - Page 479

IC AVR MCU 2.4GHZ XCEIVER 64QFN

ATMEGA128RFA1-ZU

Manufacturer Part Number
ATMEGA128RFA1-ZU
Description
IC AVR MCU 2.4GHZ XCEIVER 64QFN
Manufacturer
Atmel
Series
ATMEGAr

Specifications of ATMEGA128RFA1-ZU

Frequency
2.4GHz
Data Rate - Maximum
2Mbps
Modulation Or Protocol
802.15.4 Zigbee
Applications
General Purpose
Power - Output
3.5dBm
Sensitivity
-100dBm
Voltage - Supply
1.8 V ~ 3.6 V
Current - Receiving
12.5mA
Current - Transmitting
14.5mA
Data Interface
PCB, Surface Mount
Memory Size
128kB Flash, 4kB EEPROM, 16kB RAM
Antenna Connector
PCB, Surface Mount
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VFQFN, Exposed Pad
Rf Ic Case Style
QFN
No. Of Pins
64
Supply Voltage Range
1.8V To 3.6V
Operating Temperature Range
-40°C To +85°C
Svhc
No SVHC (15-Dec-2010)
Rohs Compliant
Yes
Processor Series
ATMEGA128x
Core
AVR8
Data Bus Width
8 bit
Program Memory Type
Flash
Program Memory Size
128 KB
Data Ram Size
16 KB
Interface Type
JTAG
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
38
Number Of Timers
6
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVR128RFA1-EK1
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA128RFA1-ZU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Part Number:
ATMEGA128RFA1-ZUR
Manufacturer:
ON
Quantity:
56 000
31.8.3 Serial Programming Instruction Set
Table 31-17. Serial Programming Instruction Set
8266A-MCU Wireless-12/09
Instruction/Operation
Programming Enable
Chip Erase (Program Memory/EEPROM)
Poll RDY/BSY
Load Instruction
Load Program Memory Page, High Byte
Load Program Memory Page, Low Byte
Load EEPROM Memory Page (page access)
Read Instruction
Read Program Memory, High byte
Read Program Memory, Low byte
Read EEPROM Memory
Read Lock Bits
Read Signature Byte
¯ ¯ ¯
4. The Flash is programmed one page at a time. The memory page is loaded one byte
5. The EEPROM array is programmed one byte at a time by supplying the address and
6. Any memory location can be verified by using the Read instruction which returns the
7. At the end of the programming session, RSTN can be set high to commence normal
8. Power-off sequence (if needed): Set RESET to “1”. Turn DEVDD power off.
Table 31-16. Minimum Wait Delay before Writing the Next Flash or EEPROM Location
Table 31-17 below
not, all four bytes of the instruction must be transmitted. If the 0x53 did not echo
back, give RSTN a positive pulse and issue a new Programming Enable command.
at a time by supplying the 7 LSB of the address and data together with the Load
Program Memory Page instruction. To ensure correct loading of the page, the data
low byte must be loaded before data high byte is applied for a given address. The
Program Memory Page is stored by loading the Write Program Memory Page
instruction with the address lines 15:8. If polling (RDY/BSY
must wait at least t
Accessing the serial programming interface before the Flash write operation
completes can result in incorrect programming.
data together with the appropriate Write instruction. An EEPROM memory location is
first automatically erased before new data is written. If polling is not used, the user
must wait at least t
In a chip erased device, no 0xFFs in the data file(s) need to be programmed.
content at the selected address at serial output PDO.
operation.
t
WD_CHIPERASE
t
WD_EEPROM
t
Symbol
WD_FLASH
(4)(5)
and
Byte1
$AC
$AC
$C1
$A0
$F0
$48
$40
$28
$20
$58
$30
WD_EEPROM
WD_FLASH
Figure 31-14 on
before issuing the next page (see
before issuing the next byte (see
addr. MSB
addr. MSB
0000 aaaa
Byte2
$53
$80
$00
$00
$00
$00
$00
$00
page 480 describe the Instruction set.
Instruction Format
Minimum Wait Delay
ATmega128RFA1
0000 000aa
0000 000aa
aaaa aaaa
14.5 ms
addr. LSB
addr. LSB
addr. LSB
addr. LSB
4.5 ms
9 ms
Byte3
$00
$00
$00
$00
(1)
¯ ¯ ¯ ) is not used, the user
Table 31-16
Table 31-16
high data byte out
low data byte out
high data byte in
low data byte in
data byte out
data byte out
data byte out
data byte out
data byte in
Byte4
$00
$00
below).
below).
479

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