ATMEGA128RFA1-ZU Atmel, ATMEGA128RFA1-ZU Datasheet - Page 344

IC AVR MCU 2.4GHZ XCEIVER 64QFN

ATMEGA128RFA1-ZU

Manufacturer Part Number
ATMEGA128RFA1-ZU
Description
IC AVR MCU 2.4GHZ XCEIVER 64QFN
Manufacturer
Atmel
Series
ATMEGAr

Specifications of ATMEGA128RFA1-ZU

Frequency
2.4GHz
Data Rate - Maximum
2Mbps
Modulation Or Protocol
802.15.4 Zigbee
Applications
General Purpose
Power - Output
3.5dBm
Sensitivity
-100dBm
Voltage - Supply
1.8 V ~ 3.6 V
Current - Receiving
12.5mA
Current - Transmitting
14.5mA
Data Interface
PCB, Surface Mount
Memory Size
128kB Flash, 4kB EEPROM, 16kB RAM
Antenna Connector
PCB, Surface Mount
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VFQFN, Exposed Pad
Rf Ic Case Style
QFN
No. Of Pins
64
Supply Voltage Range
1.8V To 3.6V
Operating Temperature Range
-40°C To +85°C
Svhc
No SVHC (15-Dec-2010)
Rohs Compliant
Yes
Processor Series
ATMEGA128x
Core
AVR8
Data Bus Width
8 bit
Program Memory Type
Flash
Program Memory Size
128 KB
Data Ram Size
16 KB
Interface Type
JTAG
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
38
Number Of Timers
6
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVR128RFA1-EK1
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA128RFA1-ZU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Part Number:
ATMEGA128RFA1-ZUR
Manufacturer:
ON
Quantity:
56 000
23.4.1 Parity Bit Calculation
23.5 USART Initialization
344
ATmega128RFA1
The USART Character Size (UCSZn2:0) bits select the number of data bits in the
frame. The USART Parity Mode (UPMn1:0) bits enable and set the type of parity bit.
The selection between one or two stop bits is done by the USART Stop Bit Select
(USBSn) bit. The receiver ignores the second stop bit. A frame error will therefore only
be detected in cases where the first stop bit is zero.
The parity bit is calculated by doing an exclusive-or of all the data bits. If odd parity is
used, the result of the exclusive or is inverted. The parity bit is located between the last
data bit and first stop bit of a serial frame. The relation between the parity bit and data
bits is as follows:
The USART has to be initialized before any communication can take place. The
initialization process normally consists of setting the baud rate, setting frame format and
enabling the transmitter or the receiver depending on the usage. For interrupt driven
USART operation, the global interrupt flag should be cleared (and interrupts globally
disabled) when doing the initialization.
Before doing a re-initialization with changed baud rate or frame format, be sure that
there are no ongoing transmissions during the period the registers are changed. The
TXCn flag can be used to check that the transmitter has completed all transfers, and
the RXC flag can be used to check that there are no unread data in the receive buffer.
Note that the TXCn flag must be cleared before each transmission (before UDRn is
written) if it is used for this purpose.
The following simple USART initialization code examples show one assembly and one
C function that are equal in functionality. The examples assume asynchronous
operation using polling (no interrupts enabled) and a fixed frame format. The baud rate
is given as a function parameter. For the assembly code, the baud rate parameter is
assumed to be stored in the r17:r16 Registers.
Assembly Code Example
USART_Init:
; Set baud rate
out UBRRnH, r17
out UBRRnL, r16
; Enable receiver and transmitter
ldi r16, (1<<RXENn)|(1<<TXENn)
out UCSRnB,r16
; Set frame format: 8data, 2stop bit
ldi r16, (1<<USBSn)|(3<<UCSZn0)
out UCSRnC,r16
ret
P
P
d
n
even
odd
Parity bit using even parity
Parity bit using odd parity
Data bit n of the character
P
P
even
odd
(1)
=
=
d
d
n
n
1
1
K
K
d
d
3
3
d
d
2
2
d
d
1
1
d
d
0
0
1
0
8266A-MCU Wireless-12/09

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