ATMEGA128RFA1-ZU Atmel, ATMEGA128RFA1-ZU Datasheet - Page 66

• Manufacturer Part Number: ATMEGA128RFA1-ZU
• Description: IC AVR MCU 2.4GHZ XCEIVER 64QFN
• Manufacturer: Atmel
• Series: ATMEGAr

Specifications of ATMEGA128RFA1-ZU

• Frequency: 2.4GHz
• Data Rate - Maximum: 2Mbps
• Modulation Or Protocol: 802.15.4 Zigbee
• Applications: General Purpose
• Power - Output: 3.5dBm
• Sensitivity: -100dBm
• Voltage - Supply: 1.8 V ~ 3.6 V
• Current - Receiving: 12.5mA
• Current - Transmitting: 14.5mA
• Data Interface: PCB, Surface Mount
• Memory Size: 128kB Flash, 4kB EEPROM, 16kB RAM
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VFQFN, Exposed Pad
• Rf Ic Case Style: QFN
• No. Of Pins: 64
• Supply Voltage Range: 1.8V To 3.6V
• Operating Temperature Range: -40°C To +85°C
• Svhc: No SVHC (15-Dec-2010)
• Rohs Compliant: Yes
• Processor Series: ATMEGA128x
• Core: AVR8
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 128 KB
• Data Ram Size: 16 KB
• Interface Type: JTAG
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 38
• Number Of Timers: 6
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVR128RFA1-EK1
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

9.5.1.2.7 MAC Service Data Unit (MSDU)
9.5.1.2.8 MAC Footer (MFR) Fields
9.5.2 Frame Check Sequence (FCS)
9.5.2.1 Overview
9.5.2.2 CRC calculation
66
ATmega128RFA1
subfield b3 is set to one (see section
2003 and IEEE 802.15.4-2006" on
IEEE 802.15.4-2006, 7.6.2 Auxiliary security header.
This is the actual MAC payload. It is usually structured according to the individual frame
type. A description can be found in IEEE 802.15.4-2006, chapter 5.5.3.2.
The MAC footer consists of a two-octet Frame Checksum (FCS). For details refer to the
following section
The Frame Check Sequence (FCS) is characterized by:
• Indicate bit errors based on a cyclic redundancy check (CRC) of 16 bit length;
• Uses International Telecommunication Union (ITU) CRC polynomial;
• Automatically evaluated during reception;
• Can be automatically generated during transmission.
The FCS is intended for use at the MAC layer to detect corrupted frames at a first level
of filtering. It is computed by applying an ITU CRC polynomial to all transferred bytes
following the length field (MHR and MSDU fields). The frame check sequence has a
length of 16 bit and is located in the last two bytes of a frame (MAC footer, see
9-15 on
The radio transceiver applies an FCS check on each received frame. The result of the
FCS check is stored in bit RX_CRC_VALID of register PHY_RSSI.
On transmit the radio transceiver generates and appends the FCS bytes during the
frame
TX_AUTO_CRC_ON = 0 in register TRX_CTRL_1.
The CRC polynomial used in IEEE 802.15.4 networks is defined by
The FCS shall be calculated for transmission using the following algorithm:
Let
be the polynomial representing the sequence of bits for which the checksum is to be
computed. Multiply M(x) by x
Divide
polynomial
The FCS field is given by the coefficients of the remainder polynomial, R(x).
N
page 62).
transmission.
G
M
R
N
(x
16
(
(
(
x
x
)
(
x
)
)
x
)
modulo 2 by the generator polynomial G
=
)
=
=
=
r
M
"Frame Check Sequence (FCS)"
b
0
x
0
x
x
(
16
15
x
k
−
)
+
+
1
⋅
+
x
r
This
x
1
12
16
b
x
1
14
x
+
16
k
+
x
−
giving the polynomial
2
behavior
5
...
+
+
+
K
1
r
14
+
x
b
page 65). For details of its structure see
"Frame Compatibility between IEEE 802.15.4-
k
+
−
can
2
r
x
15
+
b
k
be
−
below.
1
disabled
16
(x) to obtain the remainder
by
8266A-MCU Wireless-12/09
setting
the
Figure
bit