ATMEGA128RFA1-ZU Atmel, ATMEGA128RFA1-ZU Datasheet - Page 356

• Manufacturer Part Number: ATMEGA128RFA1-ZU
• Description: IC AVR MCU 2.4GHZ XCEIVER 64QFN
• Manufacturer: Atmel
• Series: ATMEGAr

Specifications of ATMEGA128RFA1-ZU

• Frequency: 2.4GHz
• Data Rate - Maximum: 2Mbps
• Modulation Or Protocol: 802.15.4 Zigbee
• Applications: General Purpose
• Power - Output: 3.5dBm
• Sensitivity: -100dBm
• Voltage - Supply: 1.8 V ~ 3.6 V
• Current - Receiving: 12.5mA
• Current - Transmitting: 14.5mA
• Data Interface: PCB, Surface Mount
• Memory Size: 128kB Flash, 4kB EEPROM, 16kB RAM
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VFQFN, Exposed Pad
• Rf Ic Case Style: QFN
• No. Of Pins: 64
• Supply Voltage Range: 1.8V To 3.6V
• Operating Temperature Range: -40°C To +85°C
• Svhc: No SVHC (15-Dec-2010)
• Rohs Compliant: Yes
• Processor Series: ATMEGA128x
• Core: AVR8
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 128 KB
• Data Ram Size: 16 KB
• Interface Type: JTAG
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 38
• Number Of Timers: 6
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVR128RFA1-EK1
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

23.10 Register Description
23.10.1 UDR0 – USART0 I/O Data Register
23.10.2 UCSR0A – USART0 Control and Status Register A
356
ATmega128RFA1
Do not use read-modify-write instructions (SBI and CBI) to set or clear the MPCMn bit.
The MPCMn bit shares the same I/O location as the TXCn flag and this might
accidentally be cleared when using SBI or CBI instructions.
The USART Transmit Data Buffer Register and USART Receive Data Buffer Registers
share the same I/O address referred to as USART Data Register or UDR0. The
Transmit Data Buffer Register (TXB) will be the destination for data written to the UDR0
Register location. Reading the UDR0 Register location will return the contents of the
Receive Data Buffer Register (RXB). For 5-, 6-, or 7-bit characters the upper unused
bits will be ignored by the Transmitter and set to zero by the Receiver. The transmit
buffer can only be written when the UDRE0 Flag in the UCSR0A Register is set. Data
written to UDR0 when the UDRE0 Flag is not set, will be ignored by the USART
Transmitter. When data is written to the transmit buffer and the Transmitter is enabled,
the Transmitter will load the data into the Transmit Shift Register when the Shift
Register is empty. Then the data will be serially transmitted on the TxD0 pin. The
receive buffer consists of a two level FIFO. The FIFO will change its state whenever the
receive buffer is accessed. Due to this behavior of the receive buffer, do not use Read-
Modify-Write instructions (SBI and CBI) on this location. Be careful when using bit test
instructions (SBIC and SBIS), since these also will change the state of the FIFO.
• Bit 7:0 – UDR07:00 - USART I/O Data Register
• Bit 7 – RXC0 - USART Receive Complete
This flag bit is set when there are unread data in the receive buffer and cleared when
the receive buffer is empty (i.e., does not contain any unread data). If the Receiver is
disabled, the receive buffer will be flushed and consequently the RXC0 bit will become
zero. The RXC0 Flag can be used to generate a Receive Complete interrupt (see
description of the RXCIE0 bit).
• Bit 6 – TXC0 - USART Transmit Complete
This flag bit is set when the entire frame in the Transmit Shift Register has been shifted
out and there are no new data currently present in the transmit buffer (UDR0). The
TXC0 Flag bit is automatically cleared when a transmit complete interrupt is executed,
or it can be cleared by writing a one to its bit location. The TXC0 Flag can generate a
Transmit Complete interrupt (see description of the TXCIE0 bit).
Bit
NA ($C6)
Read/Write
Initial Value
Bit
NA ($C0)
Read/Write
Initial Value
RW
RXC0
7
0
R
7
0
RW
6
0
TXC0
RW
6
0
RW
5
0
UDRE0
R
5
1
RW
4
0
UDR07:00
FE0
R
4
0
RW
3
0
DOR0
R
3
0
RW
2
0
UPE0
R
2
0
RW
1
0
U2X0
RW
RW
1
0
0
0
8266A-MCU Wireless-12/09
MPCM0
RW
0
0
UDR0
UCSR0A