ATMEGA128RFA1-ZU Atmel, ATMEGA128RFA1-ZU Datasheet - Page 166

• Manufacturer Part Number: ATMEGA128RFA1-ZU
• Description: IC AVR MCU 2.4GHZ XCEIVER 64QFN
• Manufacturer: Atmel
• Series: ATMEGAr

Specifications of ATMEGA128RFA1-ZU

• Frequency: 2.4GHz
• Data Rate - Maximum: 2Mbps
• Modulation Or Protocol: 802.15.4 Zigbee
• Applications: General Purpose
• Power - Output: 3.5dBm
• Sensitivity: -100dBm
• Voltage - Supply: 1.8 V ~ 3.6 V
• Current - Receiving: 12.5mA
• Current - Transmitting: 14.5mA
• Data Interface: PCB, Surface Mount
• Memory Size: 128kB Flash, 4kB EEPROM, 16kB RAM
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VFQFN, Exposed Pad
• Rf Ic Case Style: QFN
• No. Of Pins: 64
• Supply Voltage Range: 1.8V To 3.6V
• Operating Temperature Range: -40°C To +85°C
• Svhc: No SVHC (15-Dec-2010)
• Rohs Compliant: Yes
• Processor Series: ATMEGA128x
• Core: AVR8
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 128 KB
• Data Ram Size: 16 KB
• Interface Type: JTAG
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 38
• Number Of Timers: 6
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVR128RFA1-EK1
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

12.6 Register Description
12.6.1 SMCR – Sleep Mode Control Register
166
ATmega128RFA1
register take effect in the regulator circuit. The write access from the software must be
aware of this process. Furthermore the value of LLDRH must be written first followed by
LLDRL. Otherwise the LLDRH write access will be ignored. The following Assembler
code fragment shows a working example. Note the polling of bit 3 LLCAL of the LLCR
register to verify the completion of the synchronization process.
The Sleep Mode Control Register contains control bits for power management.
• Bit 7:4 – Res3:0 - Reserved
• Bit 3:1 – SM2:0 - Sleep Mode Select bit 2
These bits select between the five available sleep modes. Standby modes are only
recommended for use with external crystals or resonators.
Table 12-4 SM Register Bits
• Bit 0 – SE - Sleep Enable
Bit
$33 ($53)
Read/Write
Initial Value
Assembly Code Example
Register Bits
SM2:0
; poll LLCAL bit of LLCR to check if automatic calibration is
; turned of
wait_calib:
…
clr r20
IOST LLDRH,r18
IOST LLDRL,r19
IOST LLCR,r20
IOLD r20,LLCR
sbrc r20,3
rjmp wait_calib
…
Res3
R
7
0
Res2
R
6
0
; write LLDRH first
; write LLDRL second
; bit 0 cleared = disable automatic calibration
; not executed if bit 3 of LLCR is cleared
Res1
R
5
0
Value
0x00
0x01
0x02
0x03
0x04
0x05
0x06
0x07
Res0
R
4
0
Description
Idle
ADC Noise Reduction (If Available)
Power Down
Power Save
Reserved
Reserved
Standby
Extended Standby
SM2
RW
3
0
SM1
RW
2
0
SM0
RW
1
0
8266A-MCU Wireless-12/09
RW
SE
0
0
SMCR