ATMEGA128RFA1-ZU Atmel, ATMEGA128RFA1-ZU Datasheet - Page 47

• Manufacturer Part Number: ATMEGA128RFA1-ZU
• Description: IC AVR MCU 2.4GHZ XCEIVER 64QFN
• Manufacturer: Atmel
• Series: ATMEGAr

Specifications of ATMEGA128RFA1-ZU

• Frequency: 2.4GHz
• Data Rate - Maximum: 2Mbps
• Modulation Or Protocol: 802.15.4 Zigbee
• Applications: General Purpose
• Power - Output: 3.5dBm
• Sensitivity: -100dBm
• Voltage - Supply: 1.8 V ~ 3.6 V
• Current - Receiving: 12.5mA
• Current - Transmitting: 14.5mA
• Data Interface: PCB, Surface Mount
• Memory Size: 128kB Flash, 4kB EEPROM, 16kB RAM
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VFQFN, Exposed Pad
• Rf Ic Case Style: QFN
• No. Of Pins: 64
• Supply Voltage Range: 1.8V To 3.6V
• Operating Temperature Range: -40°C To +85°C
• Svhc: No SVHC (15-Dec-2010)
• Rohs Compliant: Yes
• Processor Series: ATMEGA128x
• Core: AVR8
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 128 KB
• Data Ram Size: 16 KB
• Interface Type: JTAG
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 38
• Number Of Timers: 6
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVR128RFA1-EK1
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

8266A-MCU Wireless-12/09
Generally, at nodes, configured as a normal device or PAN coordinator, a frame is not
indicated if the frame filter does not match and the FCS is invalid. Otherwise, the
TRX_24_RX_END interrupt is issued after the completion of the frame reception. The
microcontroller can then read the frame. An exception applies if promiscuous mode is
enabled (see section
TRX_24_RX_END interrupt is issued even if the FCS fails.
If the content of the MAC addressing fields of the received frame (refer to
IEEE 802.15.4 section 7.2.1) matches one of the configured addresses, dependent on
the addressing mode, an address match interrupt (TRX24_XAH_AMI) is issued (refer to
section
registers Short-address, PAN-ID and IEEE-address. Frame filtering as described in
section
During reception the radio transceiver parses bit[5] (ACK Request) of the frame control
field of the received data or the MAC command frame to check if an ACK reply is
expected. In that case and if the frame passes the third level of filtering (see
IEEE 802.15.4-2006, section 7.5.6.2), the radio transceiver automatically generates and
transmits an ACK frame. After the ACK transmission is finished, a TRX24_TX_END
interrupt is generated.
The content of the frame pending subfield of the ACK response is set by bit
AACK_SET_PD of register CSMA_SEED_1 when the ACK frame is sent in response to
a data request MAC command frame, otherwise this subfield is set to “0”. The
sequence number is copied from the received frame.
Optionally, the start of the transmission of the acknowledgement frame can be
influenced by register bit AACK_ACK_TIME. Default value (according to standard
IEEE 802.15.4, page 54) is 12 symbol times after the reception of the last symbol of a
data or MAC command frame.
If the bit AACK_DIS_ACK of register CSMA_SEED_1 is set, no acknowledgement
frame is sent even if an acknowledgment frame was requested. This is useful for
operating the MAC hardware accelerator in promiscuous mode (see section
"Configuration of non IEEE 802.15.4 Compliant Scenarios" on
The status of the RX_AACK operation is indicated by the bits TRAC_STATUS of
register TRAC_STATUS.
During
BUSY_RX_AACK state.
"Frame Filtering" on
"Frame Filtering" on
the
operations
"Configuration of IEEE Scenarios" on
described
page 54 is also valid for Basic Operating Mode.
page 54). The expected address values are to be stored in
above
the
ATmega128RFA1
radio
transceiver
page 50). In that case a
page 52).
remains
47
in