ATMEGA128RFA1-ZU Atmel, ATMEGA128RFA1-ZU Datasheet - Page 311

• Manufacturer Part Number: ATMEGA128RFA1-ZU
• Description: IC AVR MCU 2.4GHZ XCEIVER 64QFN
• Manufacturer: Atmel
• Series: ATMEGAr

Specifications of ATMEGA128RFA1-ZU

• Frequency: 2.4GHz
• Data Rate - Maximum: 2Mbps
• Modulation Or Protocol: 802.15.4 Zigbee
• Applications: General Purpose
• Power - Output: 3.5dBm
• Sensitivity: -100dBm
• Voltage - Supply: 1.8 V ~ 3.6 V
• Current - Receiving: 12.5mA
• Current - Transmitting: 14.5mA
• Data Interface: PCB, Surface Mount
• Memory Size: 128kB Flash, 4kB EEPROM, 16kB RAM
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VFQFN, Exposed Pad
• Rf Ic Case Style: QFN
• No. Of Pins: 64
• Supply Voltage Range: 1.8V To 3.6V
• Operating Temperature Range: -40°C To +85°C
• Svhc: No SVHC (15-Dec-2010)
• Rohs Compliant: Yes
• Processor Series: ATMEGA128x
• Core: AVR8
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 128 KB
• Data Ram Size: 16 KB
• Interface Type: JTAG
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 38
• Number Of Timers: 6
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVR128RFA1-EK1
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

21.4 Counter Unit
21.5 Modes of Operation
8266A-MCU Wireless-12/09
"Asynchronous Operation of Timer/Counter2" on page
and prescaler, see section
The main part of the 8-bit Timer/Counter is the programmable bi-directional counter
unit.
environment.
Figure 21-2. Counter Unit Block Diagram
Signal description (internal signals):
Depending on the mode of operation used, the counter is cleared, incremented, or
decremented at each timer clock (clk
internal clock source, selected by the Clock Select bits (CS22:0). When no clock source
is selected (CS22:0 = 0) the timer is stopped. However, the TCNT2 value can be
accessed by the CPU, regardless of whether clk
overrides (has priority over) all counter clear or count operations.
The counting sequence is determined by the setting of the WGM21 and WGM20 bits
located in the Timer/Counter Control Register (TCCR2A) and the WGM22 located in the
Timer/Counter Control Register B (TCCR2B). There are close connections between
how the counter behaves (counts) and how waveforms are generated on the Output
Compare outputs OC2A and OC2B. For more details about advanced counting
sequences and waveform generation, see chapter
The Timer/Counter Overflow Flag (TOV2) is set according to the mode of operation
selected by the WGM22:0 bits. TOV2 can be used for generating a CPU interrupt.
The mode of operation, i.e., the behaviour of the Timer/Counter and the Output
Compare pins, is defined by the combination of the Waveform Generation mode
(WGM22:0) and Compare Output mode (COM2x1:0) bits. The Compare Output mode
bits do not affect the counting sequence, while the Waveform Generation mode bits do.
The COM2x1:0 bits control whether the PWM output generated should be inverted or
Figure 21-2 below
count
direction
clear
clk
top
bottom
DATA BUS
TCNTn
Tn
shows a block diagram of the counter and its surrounding
Increment or decrement TCNT2 by 1.
Selects between increment and decrement.
Clear TCNT2 (set all bits to zero).
Timer/Counter clock, referred to as clk
Signalizes that TCNT2 has reached maximum value.
Signalizes that TCNT2 has reached minimum value (zero).
"Timer/Counter Prescaler" on page
direction
count
clear
bottom
Control Logic
T2
). clk
top
T OVn
(Int.Req.)
T2
clk T n
can be generated from an external or
"Modes of Operation"
Prescaler
T2
ATmega128RFA1
320. For details on clock sources
is present or not. A CPU write
322.
T2
in the following.
Oscillator
below.
T/C
cl k
I/O
TOSC1
TOSC2
AMR
311