ATMEGA128RFA1-ZU Atmel, ATMEGA128RFA1-ZU Datasheet - Page 325

• Manufacturer Part Number: ATMEGA128RFA1-ZU
• Description: IC AVR MCU 2.4GHZ XCEIVER 64QFN
• Manufacturer: Atmel
• Series: ATMEGAr

Specifications of ATMEGA128RFA1-ZU

• Frequency: 2.4GHz
• Data Rate - Maximum: 2Mbps
• Modulation Or Protocol: 802.15.4 Zigbee
• Applications: General Purpose
• Power - Output: 3.5dBm
• Sensitivity: -100dBm
• Voltage - Supply: 1.8 V ~ 3.6 V
• Current - Receiving: 12.5mA
• Current - Transmitting: 14.5mA
• Data Interface: PCB, Surface Mount
• Memory Size: 128kB Flash, 4kB EEPROM, 16kB RAM
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VFQFN, Exposed Pad
• Rf Ic Case Style: QFN
• No. Of Pins: 64
• Supply Voltage Range: 1.8V To 3.6V
• Operating Temperature Range: -40°C To +85°C
• Svhc: No SVHC (15-Dec-2010)
• Rohs Compliant: Yes
• Processor Series: ATMEGA128x
• Core: AVR8
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 128 KB
• Data Ram Size: 16 KB
• Interface Type: JTAG
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 38
• Number Of Timers: 6
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVR128RFA1-EK1
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

21.11.3 TCCR2A – Timer/Counter2 Control Register A
8266A-MCU Wireless-12/09
• Bit 7:6 – COM2A1:0 - Compare Match Output A Mode
These bits control the Output Compare pin (OC2A) behavior. If one or both of the
COM2A1:0 bits are set, the OC2A output overrides the normal port functionality of the
I/O pin it is connected to. However, note that the Data Direction Register (DDR) bit
corresponding to the OC2A pin must be set in order to enable the output driver. When
OC2A is connected to the pin, the function of the COM2A1:0 bits depends on the
WGM22:0 bit setting. The following table shows the COM2A1:0 bit functionality when
the WGM22:0 bits are set to a normal or CTC mode (non-PWM). Refer to section
"Compare Match Output Unit" for a description of the functionality in the other modes.
Table 21-7 COM2A Register Bits
• Bit 5:4 – COM2B1:0 - Compare Match Output B Mode
These bits control the Output Compare pin (OC2B) behavior. If one or both of the
COM2B1:0 bits are set, the OC2B output overrides the normal port functionality of the
I/O pin it is connected to. However, note that the Data Direction Register (DDR) bit
corresponding to the OC2B pin must be set in order to enable the output driver. When
OC2B is connected to the pin, the function of the COM2B1:0 bits depends on the
WGM22:0 bit setting. The following table shows the COM2B1:0 bit functionality when
the WGM22:0 bits are set to a normal or CTC mode (non-PWM). Refer to section
"Compare Match Output Unit" for a description of the functionality in the other modes.
Table 21-8 COM2B Register Bits
• Bit 3:2 – Res1:0 - Reserved
• Bit 1:0 – WGM21:20 - Waveform Generation Mode
Combined with the WGM22 bit found in the TCCR2B Register, these bits control the
counting sequence of the counter, the source for maximum (TOP) counter value, and
what type of waveform generation to be used. Modes of operation supported by the
Timer/Counter2 unit are: Normal mode (counter), Clear Timer on Compare Match
(CTC) mode, and two types of Pulse Width Modulation (PWM) modes (see section
"Modes of Operation" for details).
Bit
NA ($B0)
Read/Write
Initial Value
Register Bits
COM2A1:0
Register Bits
COM2B1:0
COM2A1 COM2A0 COM2B1 COM2B0
RW
7
0
RW
6
0
RW
5
0
Value
Value
0
1
2
3
0
1
2
3
RW
4
0
Description
Normal port operation, OC2A disconnected
Toggle OC2A on Compare Match
Clear OC2A on Compare Match
Set OC2A on Compare Match
Description
Normal port operation, OC2B disconnected
Toggle OC2B on Compare Match
Clear OC2B on Compare Match
Set OC2B on Compare Match
Res1
RW
3
0
ATmega128RFA1
Res0
RW
2
0
WGM21
RW
1
0
WGM20
RW
0
0
TCCR2A
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