ATMEGA128RFA1-ZU Atmel, ATMEGA128RFA1-ZU Datasheet - Page 465

IC AVR MCU 2.4GHZ XCEIVER 64QFN

ATMEGA128RFA1-ZU

Manufacturer Part Number
ATMEGA128RFA1-ZU
Description
IC AVR MCU 2.4GHZ XCEIVER 64QFN
Manufacturer
Atmel
Series
ATMEGAr

Specifications of ATMEGA128RFA1-ZU

Frequency
2.4GHz
Data Rate - Maximum
2Mbps
Modulation Or Protocol
802.15.4 Zigbee
Applications
General Purpose
Power - Output
3.5dBm
Sensitivity
-100dBm
Voltage - Supply
1.8 V ~ 3.6 V
Current - Receiving
12.5mA
Current - Transmitting
14.5mA
Data Interface
PCB, Surface Mount
Memory Size
128kB Flash, 4kB EEPROM, 16kB RAM
Antenna Connector
PCB, Surface Mount
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VFQFN, Exposed Pad
Rf Ic Case Style
QFN
No. Of Pins
64
Supply Voltage Range
1.8V To 3.6V
Operating Temperature Range
-40°C To +85°C
Svhc
No SVHC (15-Dec-2010)
Rohs Compliant
Yes
Processor Series
ATMEGA128x
Core
AVR8
Data Bus Width
8 bit
Program Memory Type
Flash
Program Memory Size
128 KB
Data Ram Size
16 KB
Interface Type
JTAG
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
38
Number Of Timers
6
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVR128RFA1-EK1
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA128RFA1-ZU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Part Number:
ATMEGA128RFA1-ZUR
Manufacturer:
ON
Quantity:
56 000
31.2 Fuse Bits
8266A-MCU Wireless-12/09
The ATmega128RFA1 has three Fuse bytes.
466 describe briefly the functionality of all the fuses and how they are mapped into the
Fuse bytes. Note that the fuses are read as logical zero, “0”, if they are programmed.
Table 31-3. Extended Fuse Byte
Table 31-4. Fuse High Byte
Notes:
Notes:
BLB1 Mode
Fuse High Byte
Fuse Low Byte
BODLEVEL2
BODLEVEL1
BODLEVEL0
WDTON
OCDEN
JTAGEN
SPIEN
1
2
3
4
Memory Lock Bits
1. See
(1)
1. Program the Fuse bits and Boot Lock bits before programming the LB1 and
2. “1” means un-programmed, “0” means programmed.
(4)
(3)
LB2.
(1)
(1)
(1)
Table 34-23 on page 503
BL12
1
1
0
0
Bit No
Bit No
7
6
5
4
3
2
1
0
7
6
5
4
BL11
1
0
0
1
Description
Enable On-chip debugging
(OCD)
Enable JTAG interface
Enable Serial Program and Data
Downloading (SPI)
Watchdog Timer always on
Brown-out Detector trigger level
Brown-out Detector trigger level
Brown-out Detector trigger level
Protection Type
No restrictions for SPM or (E)LPM accessing the Boot
Loader section.
SPM is not allowed to write to the Boot Loader
section.
SPM is not allowed to write to the Boot Loader
section, and (E)LPM executing from the Application
section is not allowed to read from the Boot Loader
section. If Interrupt Vectors are placed in the
Application section, interrupts are disabled while
executing from the Boot Loader section.
(E)LPM executing from the Application section is not
allowed to read from the Boot Loader section. If
Interrupt Vectors are placed in the Application
section, interrupts are disabled while executing from
the Boot Loader section.
Description
for BODLEVEL Fuse decoding.
Table 31-3 below
ATmega128RFA1
Default Value
1 (un-programmed, OCD
disabled)
0 (programmed, JTAG
enabled)
0 (programmed, SPI
programming enabled)
1 (un-programmed)
1 (un-programmed)
1 (un-programmed)
1 (un-programmed)
Table 31-5 on
Default Value
1
1
1
1
1
page
465

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