ATMEGA128RFA1-ZU Atmel, ATMEGA128RFA1-ZU Datasheet - Page 64

• Manufacturer Part Number: ATMEGA128RFA1-ZU
• Description: IC AVR MCU 2.4GHZ XCEIVER 64QFN
• Manufacturer: Atmel
• Series: ATMEGAr

Specifications of ATMEGA128RFA1-ZU

• Frequency: 2.4GHz
• Data Rate - Maximum: 2Mbps
• Modulation Or Protocol: 802.15.4 Zigbee
• Applications: General Purpose
• Power - Output: 3.5dBm
• Sensitivity: -100dBm
• Voltage - Supply: 1.8 V ~ 3.6 V
• Current - Receiving: 12.5mA
• Current - Transmitting: 14.5mA
• Data Interface: PCB, Surface Mount
• Memory Size: 128kB Flash, 4kB EEPROM, 16kB RAM
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VFQFN, Exposed Pad
• Rf Ic Case Style: QFN
• No. Of Pins: 64
• Supply Voltage Range: 1.8V To 3.6V
• Operating Temperature Range: -40°C To +85°C
• Svhc: No SVHC (15-Dec-2010)
• Rohs Compliant: Yes
• Processor Series: ATMEGA128x
• Core: AVR8
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 128 KB
• Data Ram Size: 16 KB
• Interface Type: JTAG
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 38
• Number Of Timers: 6
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVR128RFA1-EK1
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

64
ATmega128RFA1
Bit 6: the “Intra-PAN” subfield indicates that in a frame, where both, the destination and
source addresses are present, the PAN-ID of the source address filed is omitted. In
RX_AACK mode this bit is evaluated by the address filter logic of the radio transceiver.
Bit [11:10]: the “Destination Addressing Mode” subfield describes the format of the
destination address of the frame. The values of the address modes are summarized in
Table 9-17 below
Table 9-17. Frame Control Field – Destination and Source Addressing Mode
If the destination address mode is either 2 or 3 (i.e. if the destination address is
present), it always consists of a 16-bit PAN-ID first followed by either the 16-bit or 64-bit
address as defined by the mode.
Bit [13:12]: the “Frame Version” subfield specifies the version number corresponding to
the frame. These register bits are reserved in IEEE-802.15.4-2003.
This subfield shall be set to 0 to indicate a frame compatible with IEEE 802.15.4-2003
and 1 to indicate an IEEE 802.15.4-2006 frame. All other subfield values shall be
reserved for future use.
The bit AACK_FVN_MODE of register CSMA_SEED_1 controls the RX_AACK
behavior of frame acknowledgements. This register determines if, depending on the
Frame Version Number, a frame is acknowledged or not. This is necessary for
backward compatibility to IEEE 802.15.4-2003 and for future use. Even if frame version
numbers 2 and 3 are reserved, it can be handled by the radio transceiver. For details
refer to
page
See IEEE 802.15.4-2006, section 7.2.3 for details on frame compatibility.
Table 9-18. Frame Control Field – Frame Version Subfield
Bit [15:14]: the “Source Addressing Mode” subfield, with similar meaning as
“Destination Addressing Mode” (refer to
The subfields of the FCF (Bits 0–2, 3, 6, 10–15) affect the address filter logic of the
radio transceiver while executing a RX_AACK operation (see
Receive with Automatic ACK" on page
Frame Control Field Bit Assignments
Frame Control Field Bit Assignments
Addressing Mode
Frame Version
129.
b
b
"CSMA_SEED_1 – Transceiver Acknowledgment Frame Control Register 2" on
b
11
15
13
00
01
10
11
00
01
10
11
b
b
b
10
14
12
according to IEEE 802.15.4:
Value
Value
0
1
2
3
0
1
2
3
46).
Table 9-17
Description
PAN identifier and address fields are not present
Reserved
Address field contains a 16-bit short address
Address field contains a 64-bit extended address
Description
Frames are compatible with IEEE 802.15.4-2003
Frames are compatible with IEEE 802.15.4-2006
Reserved
Reserved
above).
8266A-MCU Wireless-12/09
"RX_AACK_ON –