ATMEGA128RFA1-ZU Atmel, ATMEGA128RFA1-ZU Datasheet - Page 156

• Manufacturer Part Number: ATMEGA128RFA1-ZU
• Description: IC AVR MCU 2.4GHZ XCEIVER 64QFN
• Manufacturer: Atmel
• Series: ATMEGAr

Specifications of ATMEGA128RFA1-ZU

• Frequency: 2.4GHz
• Data Rate - Maximum: 2Mbps
• Modulation Or Protocol: 802.15.4 Zigbee
• Applications: General Purpose
• Power - Output: 3.5dBm
• Sensitivity: -100dBm
• Voltage - Supply: 1.8 V ~ 3.6 V
• Current - Receiving: 12.5mA
• Current - Transmitting: 14.5mA
• Data Interface: PCB, Surface Mount
• Memory Size: 128kB Flash, 4kB EEPROM, 16kB RAM
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VFQFN, Exposed Pad
• Rf Ic Case Style: QFN
• No. Of Pins: 64
• Supply Voltage Range: 1.8V To 3.6V
• Operating Temperature Range: -40°C To +85°C
• Svhc: No SVHC (15-Dec-2010)
• Rohs Compliant: Yes
• Processor Series: ATMEGA128x
• Core: AVR8
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 128 KB
• Data Ram Size: 16 KB
• Interface Type: JTAG
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 38
• Number Of Timers: 6
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVR128RFA1-EK1
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

12 Power Management and Sleep Modes
12.1 Deep-Sleep Mode
12.2 AVR Microcontroller Sleep Modes
Table 12-1. Active Clock Domains and Wake-up Sources in the Different Sleep Modes
156
Sleep Mode
Idle
ADCNRM
ATmega128RFA1
Active Clock Domains
X
Sleep modes enable the application to shut down unused modules in the MCU, thereby
saving power. The AVR microcontroller and the RF transceiver provide various sleep
modes allowing the user to tailor the power consumption to the application’s
requirements.
When the microcontroller goes into Power-down or Power-save modes while the
transceiver is in SLEEP state the device enters the Deep-Sleep mode.
Sending the microcontroller to Power-down or Power-save is not allowed during the
wake-up phase of the transceiver. The TRX24_AWAKE interrupt shall be used to wait
for the transceiver is operational.
The DVDD voltage regulator and the associated power chain will be switched off.
Remaining running logic will then be supplied from the Low Leakage Voltage Regulator.
Even the AVDD regulator will switched off. See chapter
160
The SRAM blocks use the data retention mode to preserve its content while saving
leakage power. The Low Leakage Voltage Regulator has only limited driving
capabilities, see section
Therefore the remaining running logic must be clocked with low frequencies only.
The Deep-Sleep mode can be finished by a wake-up source shown by the
below. Then DVDD voltage regulator and the associated power chain will be switched
on. If the power-chain is completely enabled the standard AVR wake-up procedure
continues (for details see chapter
Note that the wake-up time from Deep-sleep mode is significantly longer than the wake-
up time from the Power-down or Power-save mode because the entire power-chain will
be restarted.
Additionally note that if the ADC is enabled and/or running a conversion, while entering
Deep-sleep mode, the ADC supply voltage is switched off. Therefore the ADC must be
disabled before entering Deep-sleep mode to avoid an undefined ADC operation.
In chapter
in the ATmega128RFA1, and their distribution were presented.
147
different sleep modes and their wake-up sources.
X
X
how to disable the radio transceiver.
is helpful in selecting an appropriate sleep mode. The following table shows the
"System Clock and Clock Options" on page 147
X
X
Oscillators
X
X
"Supply Voltage and Leakage Control" on page 161
X
X
(2)
(2)
X
X
(3)
"Power-chain" on page
X
X
X
X
(2)
Wake-up Sources
X
X
161).
"Radio Transceiver" on page
X
X
the different clock systems
Figure 11-1 on page
X
X
8266A-MCU Wireless-12/09
X
Table 12-1
for details.
X
X
X
X