ATMEGA128RFA1-ZU Atmel, ATMEGA128RFA1-ZU Datasheet - Page 45

• Manufacturer Part Number: ATMEGA128RFA1-ZU
• Description: IC AVR MCU 2.4GHZ XCEIVER 64QFN
• Manufacturer: Atmel
• Series: ATMEGAr

Specifications of ATMEGA128RFA1-ZU

• Frequency: 2.4GHz
• Data Rate - Maximum: 2Mbps
• Modulation Or Protocol: 802.15.4 Zigbee
• Applications: General Purpose
• Power - Output: 3.5dBm
• Sensitivity: -100dBm
• Voltage - Supply: 1.8 V ~ 3.6 V
• Current - Receiving: 12.5mA
• Current - Transmitting: 14.5mA
• Data Interface: PCB, Surface Mount
• Memory Size: 128kB Flash, 4kB EEPROM, 16kB RAM
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VFQFN, Exposed Pad
• Rf Ic Case Style: QFN
• No. Of Pins: 64
• Supply Voltage Range: 1.8V To 3.6V
• Operating Temperature Range: -40°C To +85°C
• Svhc: No SVHC (15-Dec-2010)
• Rohs Compliant: Yes
• Processor Series: ATMEGA128x
• Core: AVR8
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 128 KB
• Data Ram Size: 16 KB
• Interface Type: JTAG
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 38
• Number Of Timers: 6
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVR128RFA1-EK1
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

9.4.2.1 State Control
9.4.2.2 Configuration
8266A-MCU Wireless-12/09
The Extended Operating Mode states RX_AACK and TX_ARET are controlled via the
bits TRX_CMD of register TRX_STATE, which receives the state transition commands.
The states are entered from TRX_OFF or PLL_ON state as illustrated in
page 44. The completion of each state change command shall always be confirmed by
reading the TRX_STATUS register.
RX_AACK - Receive with Automatic ACK
A state transition to RX_AACK_ON from PLL_ON or TRX_OFF is initiated by writing the
command RX_AACK_ON to the register bits TRX_CMD. The state change can be
confirmed by reading register TRX_STATUS, those changes to RX_AACK_ON or
BUSY_RX_AACK on success. BUSY_RX_AACK is returned if a frame is currently
being received.
The RX_AACK state is left by writing command TRX_OFF or PLL_ON to the register
bits TRX_CMD. If the radio transceiver is within a frame receive or acknowledgment
procedure (BUSY_RX_AACK) the state change is executed after finish. Alternatively,
the commands FORCE_TRX_OFF or FORCE_PLL_ON can be used to cancel the
RX_AACK transaction and change into radio transceiver state TRX_OFF or PLL_ON
respectively.
TX_ARET - Transmit with Automatic Retry and CSMA-CA Retry
Similarly, a state transition to TX_ARET_ON from PLL_ON or TRX_OFF is initiated by
writing command TX_ARET_ON to register bits TRX_CMD. The radio transceiver is in
the TX_ARET_ON state after TRX_STATUS register changes to TX_ARET_ON. The
TX_ARET transaction is started with writing ‘1’ to the SLPTR bit of the TRXPR register
or writing the command TX_START to register bits TRX_CMD.
TX_ARET state is left by writing the command TRX_OFF or PLL_ON to the register bits
TRX_CMD. If the radio transceiver is within a CSMA-CA, a frame-transmit or an
acknowledgment procedure (BUSY_TX_ARET) the state change is executed after
finish. Alternatively, the command FORCE_TRX_OFF or FORCE_PLL_ON can be
used to instantly terminate the TX_ARET transaction and change into radio transceiver
states TRX_OFF or PLL_ON, respectively.
Note that a state change request from TRX_OFF to RX_AACK_ON or TX_ARET_ON
internally passes the state PLL_ON to initiate the radio transceiver. Thus the readiness
to receive or transmit data is delayed accordingly. It is recommended to use interrupt
TRX24_PLL_LOCK as an indicator.
The use of the Extended Operating Mode is based on Basic Operating Mode
functionality. Only features beyond the basic radio transceiver functionality are
described in the following sections. For details on the Basic Operating Mode refer to
section
When using the RX_AACK or TX_ARET modes, the following registers needs to be
configured.
RX_AACK configuration steps:
• Short
• Configure RX_AACK properties (register XAH_CTRL_0, CSMA_SEED_1)
SHORT_ADDR_1, PAN_ID_0, PAN_ID_1, IEEE_ADDR_0 … IEEE_ADDR_7)
"Basic Operating Mode" on page
address,
o
Handling of Frame Version Subfield
PAN-ID
and
IEEE
35.
address
ATmega128RFA1
(register
SHORT_AADR_0,
Figure 9-18 on
45