ATMEGA128RFA1-ZU Atmel, ATMEGA128RFA1-ZU Datasheet - Page 218

• Manufacturer Part Number: ATMEGA128RFA1-ZU
• Description: IC AVR MCU 2.4GHZ XCEIVER 64QFN
• Manufacturer: Atmel
• Series: ATMEGAr

Specifications of ATMEGA128RFA1-ZU

• Frequency: 2.4GHz
• Data Rate - Maximum: 2Mbps
• Modulation Or Protocol: 802.15.4 Zigbee
• Applications: General Purpose
• Power - Output: 3.5dBm
• Sensitivity: -100dBm
• Voltage - Supply: 1.8 V ~ 3.6 V
• Current - Receiving: 12.5mA
• Current - Transmitting: 14.5mA
• Data Interface: PCB, Surface Mount
• Memory Size: 128kB Flash, 4kB EEPROM, 16kB RAM
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VFQFN, Exposed Pad
• Rf Ic Case Style: QFN
• No. Of Pins: 64
• Supply Voltage Range: 1.8V To 3.6V
• Operating Temperature Range: -40°C To +85°C
• Svhc: No SVHC (15-Dec-2010)
• Rohs Compliant: Yes
• Processor Series: ATMEGA128x
• Core: AVR8
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 128 KB
• Data Ram Size: 16 KB
• Interface Type: JTAG
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 38
• Number Of Timers: 6
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVR128RFA1-EK1
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

16 External Interrupts
16.1 Pin Change Interrupt Timing
218
ATmega128RFA1
The External Interrupts are triggered by the INT7:0 pin or any of the PCINT8:0 pins.
Observe that if enabled, the interrupts will trigger even if the INT7:0 or PCINT8:0 pins
are configured as outputs. This feature provides a way of generating a software
interrupt.
The Pin Change Interrupt PCI0 will trigger if any enabled PCINT7:0 pin toggles, Pin
change interrupt PCI1 if the enabled PCINT8 toggles. PCINT23:9 have no function
inside the ATmega128RFA1. Their corresponding I/O port are not implemented.
PCMSK1 and PCMSK0 Registers control which pins contribute to the pin change
interrupts. PCI2 and PCMSK2 associated to PCINT23:16 have no task in this design.
Pin change interrupts on PCINT8:0 are detected asynchronously. This implies that
these interrupts can be used for waking the part also from sleep modes other than Idle
mode.
The External Interrupts can be triggered by a falling or rising edge or a low level. This is
set up as indicated in the specification for the External Interrupt Control Registers –
EICRA (INT3:0) and EICRB (INT7:4). When the external interrupt is enabled and is
configured as level triggered, the interrupt will trigger as long as the pin is held low.
Note that recognition of falling or rising edge interrupts on INT7:4 requires the presence
of an I/O clock, described in
interrupt on INT3:0 are detected asynchronously. This implies that these interrupts can
be used for waking the part also from sleep modes other than Idle mode. The I/O clock
is halted in all sleep modes except Idle mode.
Note that if a level triggered interrupt is used for wake-up from Power-down, the
required level must be held long enough for the MCU to complete the wake-up to trigger
the level interrupt. If the level disappears before the end of the Start-up Time, the MCU
will still wake up, but no interrupt will be generated. The start-up time is defined by the
SUT and CKSEL Fuses as described in
An example of timing of a pin change interrupt is shown in
Figure 16-1. Normal Pin Change Interrupt
PCINT(0)
pcint_setflag
pcint_in_(n)
clk
PCINT(n)
pcint_syn
pin_sync
pin_lat
PCIF
LE
clk
pin_lat
D
Q
pin_sync
PCINT(0) in PCMSK(x)
pcint_in_(0)
"Overview" on page
0
x
clk
"Clock Sources" on page
pcint_syn
3. Low level interrupts and the edge
Figure 16-1
pcint_setflag
148.
8266A-MCU Wireless-12/09
PCIF
below.