ATMEGA128RFA1-ZU Atmel, ATMEGA128RFA1-ZU Datasheet - Page 313

• Manufacturer Part Number: ATMEGA128RFA1-ZU
• Description: IC AVR MCU 2.4GHZ XCEIVER 64QFN
• Manufacturer: Atmel
• Series: ATMEGAr

Specifications of ATMEGA128RFA1-ZU

• Frequency: 2.4GHz
• Data Rate - Maximum: 2Mbps
• Modulation Or Protocol: 802.15.4 Zigbee
• Applications: General Purpose
• Power - Output: 3.5dBm
• Sensitivity: -100dBm
• Voltage - Supply: 1.8 V ~ 3.6 V
• Current - Receiving: 12.5mA
• Current - Transmitting: 14.5mA
• Data Interface: PCB, Surface Mount
• Memory Size: 128kB Flash, 4kB EEPROM, 16kB RAM
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VFQFN, Exposed Pad
• Rf Ic Case Style: QFN
• No. Of Pins: 64
• Supply Voltage Range: 1.8V To 3.6V
• Operating Temperature Range: -40°C To +85°C
• Svhc: No SVHC (15-Dec-2010)
• Rohs Compliant: Yes
• Processor Series: ATMEGA128x
• Core: AVR8
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 128 KB
• Data Ram Size: 16 KB
• Interface Type: JTAG
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 38
• Number Of Timers: 6
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVR128RFA1-EK1
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

21.5.3 Fast PWM Mode
8266A-MCU Wireless-12/09
Figure 21-3. CTC Mode, Timing Diagram
An interrupt can be generated each time the counter value reaches the TOP value by
using the OCF2A Flag. If the interrupt is enabled, the interrupt handler routine can be
used for updating the TOP value. However, changing TOP to a value close to BOTTOM
when the counter is running with none or a low prescaler value must be done with care
since the CTC mode does not have the double buffering feature. If the new value
written to OCR2A is lower than the current value of TCNT2, the counter will miss the
compare match. The counter will then have to count to its maximum value (0xFF) and
wrap around starting at 0x00 before the compare match can occur.
For generating a waveform output in CTC mode, the OC2A output can be set to toggle
its logical level on each compare match by setting the Compare Output mode bits to
toggle mode (COM2A1:0 = 1). The OC2A value will not be visible on the port pin unless
the data direction for the pin is set to output. The waveform generated will have a
maximum frequency of f
waveform frequency is defined by the following equation
The N variable represents the pre-scale factor (1, 8, 32, 64, 128, 256, or 1024).
As for the Normal mode of operation, the TOV2 Flag is set in the same timer clock cycle
that the counter counts from MAX to 0x00.
The Timer/Counter Overflow Flag (TOV2) is set each time the counter reaches TOP. If
the interrupt is enabled, the interrupt handler routine can be used for updating the
compare value.
In fast PWM mode, the compare unit allows generation of PWM waveforms on the
OC2x pin. Setting the COM2x1:0 bits to two will produce a non-inverted PWM and an
inverted PWM output can be generated by setting the COM2x1:0 to three. TOP is
defined as 0xFF when WGM22:0 = 3, and OCR2A when WGM22:0 = 7 (see section
"Register Description" on page 323
only be visible on the port pin if the data direction for the port pin is set as output. The
PWM waveform is generated by setting (or clearing) the OC2x Register at the compare
match between OCR2x and TCNT2, and clearing (or setting) the OC2x Register at the
timer clock cycle the counter is cleared (changes from TOP to BOTTOM).
TCNTn
OCn
(Toggle)
Period
1
OC2A
f
OCnx
2
= f
clk_I/O
=
for register TCCR2A). The actual OC2x value will
2
/2 when OCR2A is set to zero (0x00). The
⋅
3
N
⋅
f
1 (
clk
+
_
OCRnx
I
4
/
O
ATmega128RFA1
)
OCnx Interrupt Flag Set
(COMnx1:0 = 1)
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