ATMEGA128RFA1-ZU Atmel, ATMEGA128RFA1-ZU Datasheet - Page 403

• Manufacturer Part Number: ATMEGA128RFA1-ZU
• Description: IC AVR MCU 2.4GHZ XCEIVER 64QFN
• Manufacturer: Atmel
• Series: ATMEGAr

Specifications of ATMEGA128RFA1-ZU

• Frequency: 2.4GHz
• Data Rate - Maximum: 2Mbps
• Modulation Or Protocol: 802.15.4 Zigbee
• Applications: General Purpose
• Power - Output: 3.5dBm
• Sensitivity: -100dBm
• Voltage - Supply: 1.8 V ~ 3.6 V
• Current - Receiving: 12.5mA
• Current - Transmitting: 14.5mA
• Data Interface: PCB, Surface Mount
• Memory Size: 128kB Flash, 4kB EEPROM, 16kB RAM
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VFQFN, Exposed Pad
• Rf Ic Case Style: QFN
• No. Of Pins: 64
• Supply Voltage Range: 1.8V To 3.6V
• Operating Temperature Range: -40°C To +85°C
• Svhc: No SVHC (15-Dec-2010)
• Rohs Compliant: Yes
• Processor Series: ATMEGA128x
• Core: AVR8
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 128 KB
• Data Ram Size: 16 KB
• Interface Type: JTAG
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 38
• Number Of Timers: 6
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVR128RFA1-EK1
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

25.9.3 TWSR – TWI Status Register
8266A-MCU Wireless-12/09
pins enabling the slew-rate limiters and spike filters. If this bit is written to zero, the TWI
is switched off and all TWI transmissions are terminated regardless of any ongoing
operation.
• Bit 1 – Res - Reserved Bit
This bit is reserved for future use. A read access always will return zero. A write access
does not modify the content.
• Bit 0 – TWIE - TWI Interrupt Enable
When this bit is written to one and the I-bit in SREG is set, the TWI interrupt request will
be activated for as long as the TWINT Flag is high.
• Bit 7:3 – TWS4:0 - TWI Status
These 5 bits reflect the status of the TWI logic and the 2-wire Serial Bus. The different
status codes for both transmitter and receiver mode are described in the following table.
Note that the value read from TWSR contains both the 5-bit status value and the 2-bit
prescaler value. The application designer should mask the prescaler bits to zero when
checking the Status bits. This makes status checking independent of prescaler setting.
This approach is used in this datasheet, unless otherwise noted.
Table 25-8 TWS Register Bits
Bit
NA ($B9)
Read/Write
Initial Value
Register Bits
TWS4:0
TWS7
RW
7
0
TWS6
RW
6
0
TWS5
RW
5
0
Value
0x00
0x08
0x10
0x18
0x20
0x28
0x30
0x38
0x40
0x48
0x50
TWS4
RW
4
0
Description
Bus error due to illegal START or STOP
condition.
A START condition has been transmitted.
A repeated START condition has been
transmitted.
SLA+W has been transmitted; ACK has
been received.
SLA+W has been transmitted; NOT ACK has
been received.
Data byte has been transmitted; ACK has
been received.
Data byte has been transmitted; NOT ACK
has been received.
Arbitration lost in SLA+W or data bytes
(Transmitter); Arbitration lost in SLA+R or
NOT ACK bit (Receiver).
SLA+R has been transmitted; ACK has been
received.
SLA+R has been transmitted; NOT ACK has
been received.
Data byte has been received; ACK has been
TWS3
RW
3
0
ATmega128RFA1
Res
R
2
0
TWPS1
RW
1
0
TWPS0
RW
0
0
TWSR
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