ATMEGA128RFA1-ZU Atmel, ATMEGA128RFA1-ZU Datasheet - Page 53

• Manufacturer Part Number: ATMEGA128RFA1-ZU
• Description: IC AVR MCU 2.4GHZ XCEIVER 64QFN
• Manufacturer: Atmel
• Series: ATMEGAr

Specifications of ATMEGA128RFA1-ZU

• Frequency: 2.4GHz
• Data Rate - Maximum: 2Mbps
• Modulation Or Protocol: 802.15.4 Zigbee
• Applications: General Purpose
• Power - Output: 3.5dBm
• Sensitivity: -100dBm
• Voltage - Supply: 1.8 V ~ 3.6 V
• Current - Receiving: 12.5mA
• Current - Transmitting: 14.5mA
• Data Interface: PCB, Surface Mount
• Memory Size: 128kB Flash, 4kB EEPROM, 16kB RAM
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VFQFN, Exposed Pad
• Rf Ic Case Style: QFN
• No. Of Pins: 64
• Supply Voltage Range: 1.8V To 3.6V
• Operating Temperature Range: -40°C To +85°C
• Svhc: No SVHC (15-Dec-2010)
• Rohs Compliant: Yes
• Processor Series: ATMEGA128x
• Core: AVR8
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 128 KB
• Data Ram Size: 16 KB
• Interface Type: JTAG
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 38
• Number Of Timers: 6
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVR128RFA1-EK1
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

8266A-MCU Wireless-12/09
Reception of Reserved Frames
Frames with reserved frame types (see section
handled in RX_AACK mode. This might be required when implementing proprietary,
non-standard compliant protocols. It is an extension of the address filtering in
RX_AACK mode. Received frames are either handled similar to data frames or may be
allowed to completely bypass the address filter.
Table 9-10 below
frames and
Table 9-10. RX_AACK Configuration to Receive Reserved Frame Types
There are two different options for handling reserved frame types.
1. AACK_UPLD_RES_FT = 1, AACK_FLT_RES_FT = 0:
2. AACK_UPLD_RES_FT = 1, AACK_FLT_RES_FT = 1:
AACK_UPLD_RES_FT
SLOTTED_OPERATION
AACK_FLTR_RES_FT
AACK_I_AM_COORD
SHORT_ADDR_0/1
AACK_FVN_MODE
RX_SAFE_MODE
AACK_DIS_ACK
PAN_ADDR_0/1
Any non-corrupted frame with a reserved frame type is indicated by a
TRX24_RX_END interrupt. No further address filtering is applied on those frames.
A TRX24_AMI interrupt is never generated and the acknowledgment subfield is
ignored.
Register Name
IEEE_ADDR_0
IEEE_ADDR_7
…
Figure 9-19 on
shows the required configuration for a node to receive reserved
Register Bits
page 48 shows the corresponding flow chart.
7:6
7
4
5
0
3
4
Description
Set node addresses
0: disable frame protection
1: enable frame protection
1 : Enable reserved frame type reception
Filter reserved frame types like data frame type,
see note below
0 : disable
1 : enable
0: if transceiver works in un-slotted mode
1: if transceiver works in slotted mode
0: device is not PAN coordinator
1: device is PAN coordinator
0: Enable generation of acknowledgment
1: Disable generation of acknowledgment
Controls the ACK behavior, depends on FCF
frame version number
0x00 : acknowledges only frames with version
number 0, i.e. according to IEEE 802.15.4-2003
frames
0x01 : acknowledges only frames with version
number 0 or 1, i.e. frames according to
IEEE 802.15.4-2006
0x10 : acknowledges only frames with version
number 0 or 1 or 2
0x11 : acknowledges all frames, independent of
the FCF frame version number
Table 9-16 on page
ATmega128RFA1
63) can also be
53