ATMEGA128RFA1-ZU Atmel, ATMEGA128RFA1-ZU Datasheet - Page 297

• Manufacturer Part Number: ATMEGA128RFA1-ZU
• Description: IC AVR MCU 2.4GHZ XCEIVER 64QFN
• Manufacturer: Atmel
• Series: ATMEGAr

Specifications of ATMEGA128RFA1-ZU

• Frequency: 2.4GHz
• Data Rate - Maximum: 2Mbps
• Modulation Or Protocol: 802.15.4 Zigbee
• Applications: General Purpose
• Power - Output: 3.5dBm
• Sensitivity: -100dBm
• Voltage - Supply: 1.8 V ~ 3.6 V
• Current - Receiving: 12.5mA
• Current - Transmitting: 14.5mA
• Data Interface: PCB, Surface Mount
• Memory Size: 128kB Flash, 4kB EEPROM, 16kB RAM
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VFQFN, Exposed Pad
• Rf Ic Case Style: QFN
• No. Of Pins: 64
• Supply Voltage Range: 1.8V To 3.6V
• Operating Temperature Range: -40°C To +85°C
• Svhc: No SVHC (15-Dec-2010)
• Rohs Compliant: Yes
• Processor Series: ATMEGA128x
• Core: AVR8
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 128 KB
• Data Ram Size: 16 KB
• Interface Type: JTAG
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 38
• Number Of Timers: 6
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVR128RFA1-EK1
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

18.11.48 TCCR5C – Timer/Counter5 Control Register C
8266A-MCU Wireless-12/09
• Bit 2:0 – CS52:50 - Clock Select
The three clock select bits select the clock source to be used by the Timer/Counter5
according to the following table. External pin modes cannot be used for the
Timer/Counter5.
Table 18-29 CS5 Register Bits
• Bit 7 – FOC5A - Force Output Compare for Channel A
The FOC5A bit is only active when the WGM53:0 bits specify a non-PWM mode. When
writing a logical one to the FOC5A bit, an immediate compare match is forced. Due to
the limited functionality of the Timer/Counter5 the match has no direct impact on any
output pin. Note that the FOC5A bits are implemented as strobes. Therefore it is the
value present in the COM5A1:0 bits that determine the effect of the forced compare. A
FOC5A strobe will not generate any interrupt nor will it clear the timer in Clear Timer on
Compare Match (CTC) mode using OCR5A as TOP. The FOC5A bits are always read
as zero.
• Bit 6 – FOC5B - Force Output Compare for Channel B
Bit
NA ($122)
Read/Write
Initial Value
Register Bits
Register Bits
CS52:50
FOC5A
RW
7
0
FOC5B
RW
6
0
FOC5C
RW
5
0
Value
Value
0x00
0x01
0x02
0x03
0x04
0x05
0x06
0x07
0xA
0xB
0xC
0xD
0xE
0xF
0x7
0x8
0x9
Res4
R
4
0
Description
Fast PWM, 10-bit
PWM, Phase and frequency correct, TOP =
ICRn
PWM, Phase and frequency correct, TOP =
OCRnA
PWM, Phase correct, TOP = ICRn
PWM, Phase correct, TOP = OCRnA
CTC, TOP = OCRnA
Reserved
Fast PWM, TOP = ICRn
Fast PWM, TOP = OCRnA
Description
No clock source (Timer/Counter stopped)
clk_IO/1 (no prescaling)
clk_IO/8 (from prescaler)
clk_IO/64 (from prescaler)
clk_IO/256 (from prescaler)
clk_IO/1024 (from prescaler)
Reserved
Reserved
Res3
R
3
0
ATmega128RFA1
Res2
R
2
0
Res1
R
1
0
Res0
R
0
0
TCCR5C
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