ATMEGA128RFA1-ZU Atmel, ATMEGA128RFA1-ZU Datasheet - Page 457

• Manufacturer Part Number: ATMEGA128RFA1-ZU
• Description: IC AVR MCU 2.4GHZ XCEIVER 64QFN
• Manufacturer: Atmel
• Series: ATMEGAr

Specifications of ATMEGA128RFA1-ZU

• Frequency: 2.4GHz
• Data Rate - Maximum: 2Mbps
• Modulation Or Protocol: 802.15.4 Zigbee
• Applications: General Purpose
• Power - Output: 3.5dBm
• Sensitivity: -100dBm
• Voltage - Supply: 1.8 V ~ 3.6 V
• Current - Receiving: 12.5mA
• Current - Transmitting: 14.5mA
• Data Interface: PCB, Surface Mount
• Memory Size: 128kB Flash, 4kB EEPROM, 16kB RAM
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VFQFN, Exposed Pad
• Rf Ic Case Style: QFN
• No. Of Pins: 64
• Supply Voltage Range: 1.8V To 3.6V
• Operating Temperature Range: -40°C To +85°C
• Svhc: No SVHC (15-Dec-2010)
• Rohs Compliant: Yes
• Processor Series: ATMEGA128x
• Core: AVR8
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 128 KB
• Data Ram Size: 16 KB
• Interface Type: JTAG
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 38
• Number Of Timers: 6
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVR128RFA1-EK1
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

30.6.10 Reading the Signature Row from Software
8266A-MCU Wireless-12/09
Bit
Rd
The algorithm for reading the Fuse Low byte is similar to the one described above for
reading the Lock bits. To read the Fuse Low byte, load the Z-pointer with 0x0000 and
set the BLBSET and SPMEN bits in SPMCSR. When an (E)LPM instruction is executed
within three cycles after the BLBSET and SPMEN bits are set in the SPMCSR, the
value of the Fuse Low byte (FLB) will be loaded in the destination register as shown on
the next page. Refer to (see
mapping of the Fuse Low byte.
Bit
Rd
Similarly, load 0x0003 in the Z-pointer for reading the Fuse High byte. When an (E)LPM
instruction is executed within three cycles after the BLBSET and SPMEN bits are set in
the SPMCSR, the value of the Fuse High byte (FHB) will be loaded in the destination
register as shown below. Refer to
mapping of the Fuse High byte.
Bit
Rd
Load 0x0002 in the Z-pointer for reading the Extended Fuse byte. When an (E)LPM
instruction is executed within three cycles after the BLBSET and SPMEN bits are set in
the SPMCSR, the value of the Extended Fuse byte (EFB) will be loaded in the
destination register as shown below. Refer to
description and mapping of the Extended Fuse byte.
Bit
Rd
Fuse and Lock bits that are programmed will be read as zero. Fuse and Lock bits that
are un-programmed will be read as one.
To read the Signature Row from software, load the Z-pointer with the signature byte
address given in
When a LPM instruction is executed within three CPU cycles after the SIGRD and
SPMEN bits are set in SPMCSR, the signature byte value will be loaded in the
destination register. The SIGRD and SPMEN bits will auto-clear upon completion of
reading the Signature Row or if no LPM instruction is executed within three CPU cycles.
When SIGRD and SPMEN are cleared, LPM will work as described in the Instruction
Set Manual. The Signature Row cannot be read during an EEPROM write/erase
operation.
Table 30-3. Signature Row Addressing
Signature Byte
Device Signature Byte 1
Device Signature Byte 2
Device Signature Byte 3
RC Oscillator Calibration Byte
Note:
2. All other addresses are reserved for future use.
FLB7
FHB7
7
7
7
7
-
-
Table 30-3 below
FHB6
FLB6
6
6
6
6
-
-
BLB12
FLB5
FHB5
"Table 31-5" on page
5
5
5
5
-
"Table 31-4" on page 465
and set the SIGRD and SPMEN bits in SPMCSR.
BLB11
FHB4
FLB4
4
4
4
4
-
BLB02
FHB3
FLB3
3
3
3
3
-
Table 31-3 on page 465
466) for a detailed description and
ATmega128RFA1
BLB01
FHB2
EFB2
FLB2
2
2
2
2
Z-Pointer Address
for detailed description and
FHB1
FLB1
EFB1
0x0000
0x0002
0x0004
0x0001
LB2
1
1
1
1
FLB0
FHB0
EFB0
LB1
0
0
0
0
for detailed
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