ATMEGA128RFA1-ZU Atmel, ATMEGA128RFA1-ZU Datasheet - Page 347

• Manufacturer Part Number: ATMEGA128RFA1-ZU
• Description: IC AVR MCU 2.4GHZ XCEIVER 64QFN
• Manufacturer: Atmel
• Series: ATMEGAr

Specifications of ATMEGA128RFA1-ZU

• Frequency: 2.4GHz
• Data Rate - Maximum: 2Mbps
• Modulation Or Protocol: 802.15.4 Zigbee
• Applications: General Purpose
• Power - Output: 3.5dBm
• Sensitivity: -100dBm
• Voltage - Supply: 1.8 V ~ 3.6 V
• Current - Receiving: 12.5mA
• Current - Transmitting: 14.5mA
• Data Interface: PCB, Surface Mount
• Memory Size: 128kB Flash, 4kB EEPROM, 16kB RAM
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VFQFN, Exposed Pad
• Rf Ic Case Style: QFN
• No. Of Pins: 64
• Supply Voltage Range: 1.8V To 3.6V
• Operating Temperature Range: -40°C To +85°C
• Svhc: No SVHC (15-Dec-2010)
• Rohs Compliant: Yes
• Processor Series: ATMEGA128x
• Core: AVR8
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 128 KB
• Data Ram Size: 16 KB
• Interface Type: JTAG
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 38
• Number Of Timers: 6
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVR128RFA1-EK1
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

23.6.3 Transmitter Flags and Interrupts
8266A-MCU Wireless-12/09
The 9
communication mode or for other protocol handling as for example synchronization.
The USART transmitter has two flags that indicate its state: USART Data Register
Empty (UDREn) and Transmit Complete (TXCn). Both flags can be used for generating
interrupts.
The Data Register Empty Flag (UDREn) indicates whether the transmit buffer is ready
to receive new data. This bit is set when the transmit buffer is empty, and cleared when
the transmit buffer contains data to be transmitted that has not yet been moved into the
shift register. For compatibility with future devices, always write this bit to zero when
writing the UCSRnA register.
When the USART Data Register Empty Interrupt Enable (UDRIEn) bit in UCSRnB is
written to one, the USART data register empty interrupt will be executed as long as
UDREn is set (provided that global interrupts are enabled). UDREn is cleared by writing
UDRn. When interrupt-driven data transmission is used, the data register empty
interrupt routine must either write new data to UDRn in order to clear UDREn or disable
the data register empty interrupt, otherwise a new interrupt will occur once the interrupt
routine terminates.
The Transmit Complete Flag (TXCn) bit is set one when the entire frame in the transmit
shift register has been shifted out and there are no new data currently present in the
transmit buffer. The TXCn flag bit is automatically cleared when a transmission
complete interrupt is executed, or it can be cleared by writing a one to its bit location.
The TXCn flag is useful in half-duplex communication interfaces (like the RS-485
standard), where a transmitting application must enter receive mode and free the
communication bus immediately after completing the transmission.
When the Transmission Complete Interrupt Enable (TXCIEn) bit in UCSRnB is set, the
USART transmission complete interrupt will be executed when the TXCn flag becomes
set (provided that global interrupts are enabled). When the transmission complete
interrupt is used, the interrupt handling routine does not have to clear the TXCn flag.
This is done automatically when the interrupt is executed.
C Code Example
Note:
void USART_Transmit( unsigned int data )
{
}
/* Wait for empty transmit buffer */
while ( !( UCSRnA & (1<<UDREn))) );
/* Copy 9th bit to TXB8 */
UCSRnB &= ~(1<<TXB8);
if ( data & 0x0100 )
/* Put data into buffer, sends the data */
UDRn = data;
th
UCSRnB |= (1<<TXB8);
bit can be used for indicating an address frame when using multi processor
1. These transmit functions are written to be general functions. They can be
2. See
optimized if the content of the UCSRnB is static. For example, only the TXB8 bit
of the UCSRnB register is used after initialization.
(1)(2)
"About Code Examples" on page 7
ATmega128RFA1
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