ATMEGA128RFA1-ZU Atmel, ATMEGA128RFA1-ZU Datasheet - Page 56

• Manufacturer Part Number: ATMEGA128RFA1-ZU
• Description: IC AVR MCU 2.4GHZ XCEIVER 64QFN
• Manufacturer: Atmel
• Series: ATMEGAr

Specifications of ATMEGA128RFA1-ZU

• Frequency: 2.4GHz
• Data Rate - Maximum: 2Mbps
• Modulation Or Protocol: 802.15.4 Zigbee
• Applications: General Purpose
• Power - Output: 3.5dBm
• Sensitivity: -100dBm
• Voltage - Supply: 1.8 V ~ 3.6 V
• Current - Receiving: 12.5mA
• Current - Transmitting: 14.5mA
• Data Interface: PCB, Surface Mount
• Memory Size: 128kB Flash, 4kB EEPROM, 16kB RAM
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VFQFN, Exposed Pad
• Rf Ic Case Style: QFN
• No. Of Pins: 64
• Supply Voltage Range: 1.8V To 3.6V
• Operating Temperature Range: -40°C To +85°C
• Svhc: No SVHC (15-Dec-2010)
• Rohs Compliant: Yes
• Processor Series: ATMEGA128x
• Core: AVR8
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 128 KB
• Data Ram Size: 16 KB
• Interface Type: JTAG
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 38
• Number Of Timers: 6
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVR128RFA1-EK1
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Figure 9-10. Example Timing of an RX_AACK Transaction for Slotted Operation
9.4.2.4.2 RX_AACK Mode Timing
Figure 9-11. Example Timing of an RX_AACK Transaction
56
F ram e T ype
T R X _S T A T E
R X /T X
IR Q
T yp. P rocessing D elay
F ram e T ype
T R X_ ST AT E
R X/TX
IR Q
T yp . Processing D elay
S LP TR
ATmega128RFA1
R X _A A C K _O N
R X _A A C K _O N
0
0
6 4
64
If bit AACK_ACK_TIME of register XAH_CTRL_1 is set, an acknowledgment frame can
be sent already 2 symbol times after the reception of the last symbol of a data or MAC
command frame.
A timing example of an RX_AACK transaction is shown in the next figure. In this
example a data frame of length 10 with an ACK request is received. The radio
transceiver changes to state BUSY_RX_AACK after SFD detection. The completion of
the frame reception is indicated by a TRX24_RX_END interrupt. Interrupts
TRX24_RX_START and TRX24_AMI are disabled in this example. The ACK frame is
automatically transmitted after a default wait period of 12 symbols (192 µs), bit
AACK_ACK_TIME = 0 (reset value). The interrupt latency t
"Digital Interface Timing Characteristics" on page
If bit AACK_ACK_TIME of register XAH_CTRL_1 is set, an acknowledgment frame is
sent already 2 symbol times after the reception of the last symbol of a data or MAC
command frame.
S F D
S F D
R X
D ata F ram e (Length = 10, A C K = 1)
R X
R X
D ata Fram e (Length = 10, A C K = 1)
w aiting period signaled by register bits T R A C _S T A T U S
t
IR Q
t
512
IR Q
51 2
B U S Y _R X _A A C K
TR X 24 _R X _E N D
B U S Y _R X _AA C K
(6 sym bols)
(12 sym bols)
96 µ s
192 µ s
T R X 24_R X _E N D
t
T R 1 0
7 04
S LP T R
7 04
A C K transm ission initiated by m icrocontroller
507.
A C K F ram e
A C K F ram e
T X
TX
TX
IRQ
t
IR Q
is specified in section
t
IR Q
1 026
8266A-MCU Wireless-12/09
1 088
R X _A A C K _O N
R X _A AC K_O N
TR X 24_ TX _E N D
T R X 24_T X _E N D
R X
tim e [µ s]
R X
R X
tim e [µ s]