ATMEGA128RFA1-ZU Atmel, ATMEGA128RFA1-ZU Datasheet - Page 114

• Manufacturer Part Number: ATMEGA128RFA1-ZU
• Description: IC AVR MCU 2.4GHZ XCEIVER 64QFN
• Manufacturer: Atmel
• Series: ATMEGAr

Specifications of ATMEGA128RFA1-ZU

• Frequency: 2.4GHz
• Data Rate - Maximum: 2Mbps
• Modulation Or Protocol: 802.15.4 Zigbee
• Applications: General Purpose
• Power - Output: 3.5dBm
• Sensitivity: -100dBm
• Voltage - Supply: 1.8 V ~ 3.6 V
• Current - Receiving: 12.5mA
• Current - Transmitting: 14.5mA
• Data Interface: PCB, Surface Mount
• Memory Size: 128kB Flash, 4kB EEPROM, 16kB RAM
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VFQFN, Exposed Pad
• Rf Ic Case Style: QFN
• No. Of Pins: 64
• Supply Voltage Range: 1.8V To 3.6V
• Operating Temperature Range: -40°C To +85°C
• Svhc: No SVHC (15-Dec-2010)
• Rohs Compliant: Yes
• Processor Series: ATMEGA128x
• Core: AVR8
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 128 KB
• Data Ram Size: 16 KB
• Interface Type: JTAG
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 38
• Number Of Timers: 6
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVR128RFA1-EK1
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

9.12.18 IRQ_MASK – Transceiver Interrupt Enable Register
9.12.19 IRQ_STATUS – Transceiver Interrupt Status Register
114
ATmega128RFA1
This register is used to enable or disable individual interrupts of the radio transceiver.
An interrupt is enabled if the corresponding bit is set to 1. All interrupts are disabled
after the power up sequence or reset. If an interrupt is enabled it is recommended to
read the interrupt status register IRQ_STATUS first to clear the history.
• Bit 7 – AWAKE_EN - Awake Interrupt Enable
• Bit 6 – TX_END_EN - TX_END Interrupt Enable
• Bit 5 – AMI_EN - Address Match Interrupt Enable
• Bit 4 – CCA_ED_DONE_EN - End of ED Measurement Interrupt Enable
• Bit 3 – RX_END_EN - RX_END Interrupt Enable
• Bit 2 – RX_START_EN - RX_START Interrupt Enable
• Bit 1 – PLL_UNLOCK_EN - PLL Unlock Interrupt Enable
• Bit 0 – PLL_LOCK_EN - PLL Lock Interrupt Enable
This register contains the status of the pending interrupt requests. An interrupt is
pending if the associated bit has a value of one. Such a pending interrupts can be
manually cleared by writing a 1 to that register bit. Interrupts are automatically cleared
when the corresponding interrupt service routine is being executed.
• Bit 7 – AWAKE - Awake Interrupt Status
Bit
NA ($14E)
Read/Write
Initial Value
Bit
NA ($14E)
Read/Write
Initial Value
Bit
NA ($14F)
Read/Write
Initial Value
Bit
NA ($14F)
Read/Write
Initial Value
Register Bits
RX_END_EN
AWAKE_EN
RX_END
AWAKE
RW
RW
RW
RW
7
0
3
0
7
0
3
0
RX_START_EN
TX_END_EN
RX_START
TX_END
RW
RW
RW
RW
6
0
2
0
6
0
2
0
Value
2
3
PLL_UNLOCK_EN
PLL_UNLOCK
AMI_EN
RW
Description
Antenna 0: DIG1=L, DIG2=H
Default value for ANT_EXT_SW_EN=0;
Mandatory setting for applications not using
Antenna Diversity
5
0
RW
RW
AMI
RW
5
0
1
0
1
0
CCA_ED_DONE_EN
CCA_ED_DONE
PLL_LOCK_EN
PLL_LOCK
RW
RW
RW
4
0
RW
4
0
0
0
0
0
8266A-MCU Wireless-12/09
IRQ_STATUS
IRQ_STATUS
IRQ_MASK
IRQ_MASK