ATMEGA128RFA1-ZU Atmel, ATMEGA128RFA1-ZU Datasheet - Page 274

• Manufacturer Part Number: ATMEGA128RFA1-ZU
• Description: IC AVR MCU 2.4GHZ XCEIVER 64QFN
• Manufacturer: Atmel
• Series: ATMEGAr

Specifications of ATMEGA128RFA1-ZU

• Frequency: 2.4GHz
• Data Rate - Maximum: 2Mbps
• Modulation Or Protocol: 802.15.4 Zigbee
• Applications: General Purpose
• Power - Output: 3.5dBm
• Sensitivity: -100dBm
• Voltage - Supply: 1.8 V ~ 3.6 V
• Current - Receiving: 12.5mA
• Current - Transmitting: 14.5mA
• Data Interface: PCB, Surface Mount
• Memory Size: 128kB Flash, 4kB EEPROM, 16kB RAM
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VFQFN, Exposed Pad
• Rf Ic Case Style: QFN
• No. Of Pins: 64
• Supply Voltage Range: 1.8V To 3.6V
• Operating Temperature Range: -40°C To +85°C
• Svhc: No SVHC (15-Dec-2010)
• Rohs Compliant: Yes
• Processor Series: ATMEGA128x
• Core: AVR8
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 128 KB
• Data Ram Size: 16 KB
• Interface Type: JTAG
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 38
• Number Of Timers: 6
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVR128RFA1-EK1
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

18.11.13 ICR1L – Timer/Counter1 Input Capture Register Low Byte
18.11.14 TIMSK1 – Timer/Counter1 Interrupt Mask Register
274
ATmega128RFA1
The Input Capture Register is updated with the counter (TCNT1) value each time an
event occurs on the ICP1 pin or on the Analog Comparator output. The Input Capture
Register can be used for defining the counter TOP value. The Input Capture Register is
16-bit in size. To ensure that both the high and low bytes are read simultaneously when
the CPU accesses these registers, the access is performed using an 8-bit temporary
High Byte Register (TEMP). This temporary register is shared by all the other 16-bit
registers. See section "Accessing 16-bit Registers" for details.
• Bit 7:0 – ICR1L7:0 - Timer/Counter1 Input Capture Register Low Byte
• Bit 7:6 – Res1:0 - Reserved Bit
This bit is reserved for future use. A read access always will return zero. A write access
does not modify the content.
• Bit 5 – ICIE1 - Timer/Counter1 Input Capture Interrupt Enable
When this bit is written to one, and the I-flag in the Status Register is set (interrupts
globally enabled), the Timer/Counter1 Input Capture interrupt is enabled. The
corresponding Interrupt Vector is executed when the ICF1 Flag, located in TIFR1, is
set.
• Bit 4 – Res - Reserved Bit
This bit is reserved for future use. A read access always will return zero. A write access
does not modify the content.
• Bit 3 – OCIE1C - Timer/Counter1 Output Compare C Match Interrupt Enable
When this bit is written to one, and the I-flag in the Status Register is set (interrupts
globally enabled), the Timer/Counter1 Output Compare C Match interrupt is enabled.
The corresponding Interrupt Vector is executed when the OCF1C Flag, located in
TIFR1, is set.
• Bit 2 – OCIE1B - Timer/Counter1 Output Compare B Match Interrupt Enable
When this bit is written to one, and the I-flag in the Status Register is set (interrupts
globally enabled), the Timer/Counter1 Output Compare B Match interrupt is enabled.
The corresponding Interrupt Vector is executed when the OCF1B Flag, located in
TIFR1, is set.
• Bit 1 – OCIE1A - Timer/Counter1 Output Compare A Match Interrupt Enable
When this bit is written to one, and the I-flag in the Status Register is set (interrupts
globally enabled), the Timer/Counter1 Output Compare A Match interrupt is enabled.
Bit
NA ($86)
Read/Write
Initial Value
Bit
NA ($6F)
Read/Write
Initial Value
Res1
R
7
0
R
7
0
R
6
0
Res0
R
6
0
R
5
0
ICIE1
RW
5
0
R
4
0
ICR1L7:0
Res
R
4
0
R
3
0
OCIE1C
R
3
0
R
2
0
OCIE1B
R
2
0
R
1
0
OCIE1A
RW
R
0
0
1
0
8266A-MCU Wireless-12/09
TOIE1
RW
0
0
ICR1L
TIMSK1