ATMEGA128RFA1-ZU Atmel, ATMEGA128RFA1-ZU Datasheet - Page 225

IC AVR MCU 2.4GHZ XCEIVER 64QFN

ATMEGA128RFA1-ZU

Manufacturer Part Number
ATMEGA128RFA1-ZU
Description
IC AVR MCU 2.4GHZ XCEIVER 64QFN
Manufacturer
Atmel
Series
ATMEGAr

Specifications of ATMEGA128RFA1-ZU

Frequency
2.4GHz
Data Rate - Maximum
2Mbps
Modulation Or Protocol
802.15.4 Zigbee
Applications
General Purpose
Power - Output
3.5dBm
Sensitivity
-100dBm
Voltage - Supply
1.8 V ~ 3.6 V
Current - Receiving
12.5mA
Current - Transmitting
14.5mA
Data Interface
PCB, Surface Mount
Memory Size
128kB Flash, 4kB EEPROM, 16kB RAM
Antenna Connector
PCB, Surface Mount
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VFQFN, Exposed Pad
Rf Ic Case Style
QFN
No. Of Pins
64
Supply Voltage Range
1.8V To 3.6V
Operating Temperature Range
-40°C To +85°C
Svhc
No SVHC (15-Dec-2010)
Rohs Compliant
Yes
Processor Series
ATMEGA128x
Core
AVR8
Data Bus Width
8 bit
Program Memory Type
Flash
Program Memory Size
128 KB
Data Ram Size
16 KB
Interface Type
JTAG
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
38
Number Of Timers
6
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVR128RFA1-EK1
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA128RFA1-ZU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Part Number:
ATMEGA128RFA1-ZUR
Manufacturer:
ON
Quantity:
56 000
16.2.9 PCMSK0 – Pin Change Mask Register 0
8266A-MCU Wireless-12/09
• Bit 7:1 – PCINT15:9 - Pin Change Enable Mask
Bits 15:9 of the PCMSK1 register have no function in this device. The I/O ports
associated to PCINT15:9 are not implemented.
• Bit 0 – PCINT8 - Pin Change Enable Mask 8
If this bit is set to one the pin change interrupt on the corresponding I/O pin is enabled.
If this bit is set to zero the pin change interrupt is disabled.
Each bit PCINT7:0 selects whether the pin change interrupt is enabled on the
corresponding I/O pin. If PCINT7:0 is set and the PCIE0 bit in PCICR is set, the pin
change interrupt is enabled on the corresponding I/O pin. If PCINT7:0 is cleared, the pin
change interrupt on the corresponding I/O pin is disabled.
• Bit 7:0 – PCINT7:0 - Pin Change Enable Mask
Bit
NA ($6B)
Read/Write
Initial Value
PCINT7
RW
7
0
PCINT6
RW
6
0
PCINT5
RW
5
0
PCINT4
RW
4
0
PCINT3
RW
3
0
ATmega128RFA1
PCINT2
RW
2
0
PCINT1
RW
1
0
PCINT0
RW
0
0
PCMSK0
225

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