ATMEGA128RFA1-ZU Atmel, ATMEGA128RFA1-ZU Datasheet - Page 183

• Manufacturer Part Number: ATMEGA128RFA1-ZU
• Description: IC AVR MCU 2.4GHZ XCEIVER 64QFN
• Manufacturer: Atmel
• Series: ATMEGAr

Specifications of ATMEGA128RFA1-ZU

• Frequency: 2.4GHz
• Data Rate - Maximum: 2Mbps
• Modulation Or Protocol: 802.15.4 Zigbee
• Applications: General Purpose
• Power - Output: 3.5dBm
• Sensitivity: -100dBm
• Voltage - Supply: 1.8 V ~ 3.6 V
• Current - Receiving: 12.5mA
• Current - Transmitting: 14.5mA
• Data Interface: PCB, Surface Mount
• Memory Size: 128kB Flash, 4kB EEPROM, 16kB RAM
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VFQFN, Exposed Pad
• Rf Ic Case Style: QFN
• No. Of Pins: 64
• Supply Voltage Range: 1.8V To 3.6V
• Operating Temperature Range: -40°C To +85°C
• Svhc: No SVHC (15-Dec-2010)
• Rohs Compliant: Yes
• Processor Series: ATMEGA128x
• Core: AVR8
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 128 KB
• Data Ram Size: 16 KB
• Interface Type: JTAG
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 38
• Number Of Timers: 6
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVR128RFA1-EK1
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

13.5 Register Description
13.5.1 MCUSR – MCU Status Register
13.5.2 WDTCSR – Watchdog Timer Control Register
8266A-MCU Wireless-12/09
The MCU Status Register provides information on which reset source caused an MCU
reset. To make use of the Reset Flags to identify a reset condition, the user should read
and then Reset the MCUSR as early as possible in the program. If the register is
cleared before another reset occurs, the source of the reset can be found by examining
the Reset Flags. Note, after power on the bit EXTRF has to be ignored.
• Bit 7:5 – Res2:0 - Reserved
• Bit 4 – JTRF - JTAG Reset Flag
This bit is set if a reset is being caused by a logic one in the JTAG Reset Register
selected by the JTAG instruction AVR_RESET. This bit is reset by a Power-on Reset,
or by writing a logic zero to the flag.
• Bit 3 – WDRF - Watchdog Reset Flag
This bit is set if a Watchdog Reset occurs. The bit is reset by a Power-on Reset, or by
writing a logic zero to the flag.
• Bit 2 – BORF - Brown-out Reset Flag
This bit is set if a Brown-out Reset occurs. The bit is reset by a Power-on Reset, or by
writing a logic zero to the flag.
• Bit 1 – EXTRF - External Reset Flag
This bit is set if an External Reset occurs. The bit is reset by a Power-on Reset, or by
writing a logic zero to the flag.
• Bit 0 – PORF - Power-on Reset Flag
This bit is set if a Power-on Reset occurs. The bit is reset only by writing a logic zero to
the flag.
• Bit 7 – WDIF - Watchdog Timeout Interrupt Flag
This bit is set when a time-out occurs in the Watchdog Timer and the Watchdog Timer
is configured for interrupt. WDIF is cleared by hardware when executing the
corresponding interrupt handling vector. Alternatively, WDIF is cleared by writing a logic
one to the flag. When the I-bit in SREG and WDIE are set, the Watchdog Time-out
Interrupt is executed.
Bit
$34 ($54)
Read/Write
Initial Value
Bit
NA ($60)
Read/Write
Initial Value
WDIF
Res2
RW
R
7
0
7
0
WDIE
Res1
RW
R
6
0
6
0
WDP3
Res0
RW
R
5
0
5
0
WDCE
JTRF
RW
RW
4
0
4
0
WDRF
WDE
R/W
RW
3
0
3
0
ATmega128RFA1
BORF
WDP2
R/W
RW
2
0
2
0
EXTRF
WDP1
R/W
RW
1
0
1
0
WDP0
PORF
R/W
RW
0
0
0
0
WDTCSR
MCUSR
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