ATMEGA128RFA1-ZU Atmel, ATMEGA128RFA1-ZU Datasheet - Page 199

• Manufacturer Part Number: ATMEGA128RFA1-ZU
• Description: IC AVR MCU 2.4GHZ XCEIVER 64QFN
• Manufacturer: Atmel
• Series: ATMEGAr

Specifications of ATMEGA128RFA1-ZU

• Frequency: 2.4GHz
• Data Rate - Maximum: 2Mbps
• Modulation Or Protocol: 802.15.4 Zigbee
• Applications: General Purpose
• Power - Output: 3.5dBm
• Sensitivity: -100dBm
• Voltage - Supply: 1.8 V ~ 3.6 V
• Current - Receiving: 12.5mA
• Current - Transmitting: 14.5mA
• Data Interface: PCB, Surface Mount
• Memory Size: 128kB Flash, 4kB EEPROM, 16kB RAM
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VFQFN, Exposed Pad
• Rf Ic Case Style: QFN
• No. Of Pins: 64
• Supply Voltage Range: 1.8V To 3.6V
• Operating Temperature Range: -40°C To +85°C
• Svhc: No SVHC (15-Dec-2010)
• Rohs Compliant: Yes
• Processor Series: ATMEGA128x
• Core: AVR8
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 128 KB
• Data Ram Size: 16 KB
• Interface Type: JTAG
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 38
• Number Of Timers: 6
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVR128RFA1-EK1
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

14.3.4 Alternate Functions of Port F
8266A-MCU Wireless-12/09
RXD0, USART0 Receive Pin. Receive Data (Data input pin for the USART0). When the
USART0 receiver is enabled this pin is configured as an input regardless of the value of
DDRE0. When the USART0 forces this pin to be an input, a logical one in PORTE0 will
turn on the internal pull-up.
PCINT8, Pin Change Interrupt source 8: The PE0 pin can serve as an external interrupt
source.
Table 14-10 below
the overriding signals shown in
Table 14-10. Overriding Signals for Alternate Functions PE7:PE4
Signal
Name
PUOE
PUOV
DDOE
DDOV
PVOE
PVOV
DIEOE
DIEOV
DI
AIO
Table 14-11. Overriding Signals for Alternate Functions PE3:PE0
Signal
Name
PUOE
PUOV
DDOE
DDOV
PVOE
PVOV
DIEOE
DIEOV
DI
PE0
AIO
The Port F has an alternate function as analog input for the ADC as shown in
14-12 on page
these do not switch when a conversion is in progress. This might corrupt the result of
the conversion. If the JTAG interface is enabled, the pull-up resistors on pins PF7(TDI),
PF5(TMS), and PF4(TCK) will be activated even if a Reset occurs.
PE7/INT7/ICP3
0
0
0
0
0
0
INT7 ENABLE
1
INT7 INPUT / ICP3
INPUT
–
PE3/AIN1/OC3A
0
0
0
0
OC3BENABLE
OC3B
0
0
0
0
AIN1 INPUT
200. If some Port F pins are configured as outputs, it is essential that
and
Table 14-11 below
PE6/INT6/T3
0
0
0
0
0
0
INT6 ENABLE
1
INT7 INPUT / T3
INPUT
–
PE2/AIN0/XCK0
0
0
XCK0 OUTPUT
ENABLE
1
XCK0 OUTPUT
ENABLE
XCK0 OUTPUT
0
0
XCK0 INPUT
0
AIN0 INPUT
Figure 14-5 on page
relates the alternate functions of Port E to
PE5/INT5/OC3C
0
0
0
0
OC3C ENABLE
OC3C
INT5 ENABLE
1
INT5 INPUT
–
PE1/TXD0
TXEN0
0
TXEN0
1
TXEN0
TXD0
0
0
–
0
-
191.
ATmega128RFA1
PE4/INT4/OC3B
0
0
0
0
OC3B ENABLE
OC3B
INT4 ENABLE
1
INT4 INPUT
–
PE0 /
RXD0/PCINT8
RXEN0
PORTE0 & (~PUD)
RXEN0
0
0
0
PCINT8 & PCIE1
1
RXD0
PCINT8 INPUT
-
Table
199