ATMEGA128RFA1-ZU Atmel, ATMEGA128RFA1-ZU Datasheet - Page 409

• Manufacturer Part Number: ATMEGA128RFA1-ZU
• Description: IC AVR MCU 2.4GHZ XCEIVER 64QFN
• Manufacturer: Atmel
• Series: ATMEGAr

Specifications of ATMEGA128RFA1-ZU

• Frequency: 2.4GHz
• Data Rate - Maximum: 2Mbps
• Modulation Or Protocol: 802.15.4 Zigbee
• Applications: General Purpose
• Power - Output: 3.5dBm
• Sensitivity: -100dBm
• Voltage - Supply: 1.8 V ~ 3.6 V
• Current - Receiving: 12.5mA
• Current - Transmitting: 14.5mA
• Data Interface: PCB, Surface Mount
• Memory Size: 128kB Flash, 4kB EEPROM, 16kB RAM
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VFQFN, Exposed Pad
• Rf Ic Case Style: QFN
• No. Of Pins: 64
• Supply Voltage Range: 1.8V To 3.6V
• Operating Temperature Range: -40°C To +85°C
• Svhc: No SVHC (15-Dec-2010)
• Rohs Compliant: Yes
• Processor Series: ATMEGA128x
• Core: AVR8
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 128 KB
• Data Ram Size: 16 KB
• Interface Type: JTAG
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 38
• Number Of Timers: 6
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVR128RFA1-EK1
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

26.2.2 ADCSRB – ADC Control and Status Register B
26.2.3 DIDR1 – Digital Input Disable Register 1
8266A-MCU Wireless-12/09
• Bit 1:0 – ACIS1:0 - Analog Comparator Interrupt Mode Select
These bits determine which comparator events that trigger the Analog Comparator
interrupt. The different settings are shown in the following table. When changing the
ACIS1/ACIS0 bits, the Analog Comparator Interrupt must be disabled by clearing its
Interrupt Enable bit in the ACSR Register. Otherwise an interrupt can occur when the
bits are changed.
Table 26-2 ACIS Register Bits
• Bit 6 – ACME - Analog Comparator Multiplexer Enable
When this bit is written logic one and the ADC is switched off (ADEN in ADCSRA is
zero), the ADC multiplexer defines the negative input of the Analog Comparator. When
this bit is written logic zero, AIN1 is applied to the negative input of the Analog
Comparator. For a detailed description of this bit, see section "Analog Comparator
Multiplexed Input".
• Bit 1 – AIN1D - AIN1 Digital Input Disable
When this bit is written logic one, the digital input buffer on the AIN1 pin is disabled. The
corresponding PIN Register bit will always read as zero when this bit is set. When an
analog signal is applied to the AIN1 pin and the digital input from this pin is not needed,
this bit should be written logic one to reduce power consumption in the digital input
buffer.
• Bit 0 – AIN0D - AIN0 Digital Input Disable
When this bit is written logic one, the digital input buffer on the AIN0 pin is disabled. The
corresponding PIN Register bit will always read as zero when this bit is set. When an
analog signal is applied to the AIN0 pin and the digital input from this pin is not needed,
this bit should be written logic one to reduce power consumption in the digital input
buffer.
Bit
NA ($7B)
Read/Write
Initial Value
Bit
NA ($7F)
Read/Write
Initial Value
Register Bits
ACIS1:0
7
7
ACME
RW
6
0
6
5
5
Value
0x00
0x01
0x02
0x03
4
4
Description
Interrupt on Toggle
Reserved
Interrupt on Falling Edge
Interrupt on Rising Edge
3
3
ATmega128RFA1
2
2
AIN1D
RW
1
1
0
AIN0D
RW
0
0
0
ADCSRB
DIDR1
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