ATMEGA128RFA1-ZU Atmel, ATMEGA128RFA1-ZU Datasheet - Page 130

• Manufacturer Part Number: ATMEGA128RFA1-ZU
• Description: IC AVR MCU 2.4GHZ XCEIVER 64QFN
• Manufacturer: Atmel
• Series: ATMEGAr

Specifications of ATMEGA128RFA1-ZU

• Frequency: 2.4GHz
• Data Rate - Maximum: 2Mbps
• Modulation Or Protocol: 802.15.4 Zigbee
• Applications: General Purpose
• Power - Output: 3.5dBm
• Sensitivity: -100dBm
• Voltage - Supply: 1.8 V ~ 3.6 V
• Current - Receiving: 12.5mA
• Current - Transmitting: 14.5mA
• Data Interface: PCB, Surface Mount
• Memory Size: 128kB Flash, 4kB EEPROM, 16kB RAM
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VFQFN, Exposed Pad
• Rf Ic Case Style: QFN
• No. Of Pins: 64
• Supply Voltage Range: 1.8V To 3.6V
• Operating Temperature Range: -40°C To +85°C
• Svhc: No SVHC (15-Dec-2010)
• Rohs Compliant: Yes
• Processor Series: ATMEGA128x
• Core: AVR8
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 128 KB
• Data Ram Size: 16 KB
• Interface Type: JTAG
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 38
• Number Of Timers: 6
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVR128RFA1-EK1
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

9.12.47 CSMA_BE – Transceiver CSMA-CA Back-off Exponent Control Register
130
ATmega128RFA1
• Bit 4 – AACK_DIS_ACK - Disable Acknowledgment Frame Transmission
If this bit is set no acknowledgment frames are transmitted in RX_AACK Extended
Operating Mode even if requested.
• Bit 3 – AACK_I_AM_COORD - Set Personal Area Network Coordinator
This register bit has to be set if the node is a PAN coordinator. It is used for address
filtering in RX_AACK.
• Bit 2:0 – CSMA_SEED_12:10 - Seed Value for CSMA Random Number
These bits contain the bits [10:8] of the CSMA_SEED. The lower part is defined in
register CSMA_SEED_0. See register CSMA_SEED_0 for details.
This register controls the back-off exponent for the CSMA-CA procedure.
• Bit 7:4 – MAX_BE3:0 - Maximum Back-off Exponent
These register bits define the maximum back-off exponent used in the CSMA-CA
algorithm to generate a pseudo random number for back off the CCA. For details refer
to IEEE 802.15.4-2006, section 7.5.1.4. Valid values are 3 to 8.
Table 9-70 MAX_BE Register Bits
• Bit 3:0 – MIN_BE3:0 - Minimum Back-off Exponent
These register bits define the minimum back-off exponent used in the CSMA-CA
algorithm to generate a pseudo random number for back off the CCA. For details refer
to IEEE 802.15.4-2006, section 7.5.1.4. Valid values are MAX_BE, MAX_BE-1), ..., 0.
If MIN_BE = 0 and MAX_BE = 0 the CCA back off period is always set to 0.
Bit
NA ($16F)
Read/Write
Initial Value
Bit
NA ($16F)
Read/Write
Initial Value
Register Bits
MAX_BE3:0
Generator
MAX_BE3
MIN_BE3
RW
RW
7
0
3
0
MAX_BE2
MIN_BE2
RW
RW
6
1
2
0
Value
1
2
3
4
8
MAX_BE1
MIN_BE1
Description
This value is not valid for the maximum
back-off exponent.
This value is not valid for the maximum
back-off exponent.
Minimum, IEEE compliant value for the
maximum back-off exponent.
...
Maximum, IEEE compliant value for the
maximum back-off exponent.
RW
RW
5
0
1
1
MAX_BE0
MIN_BE0
RW
RW
4
1
0
1
8266A-MCU Wireless-12/09
CSMA_BE
CSMA_BE