ATMEGA128RFA1-ZU Atmel, ATMEGA128RFA1-ZU Datasheet - Page 207

• Manufacturer Part Number: ATMEGA128RFA1-ZU
• Description: IC AVR MCU 2.4GHZ XCEIVER 64QFN
• Manufacturer: Atmel
• Series: ATMEGAr

Specifications of ATMEGA128RFA1-ZU

• Frequency: 2.4GHz
• Data Rate - Maximum: 2Mbps
• Modulation Or Protocol: 802.15.4 Zigbee
• Applications: General Purpose
• Power - Output: 3.5dBm
• Sensitivity: -100dBm
• Voltage - Supply: 1.8 V ~ 3.6 V
• Current - Receiving: 12.5mA
• Current - Transmitting: 14.5mA
• Data Interface: PCB, Surface Mount
• Memory Size: 128kB Flash, 4kB EEPROM, 16kB RAM
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VFQFN, Exposed Pad
• Rf Ic Case Style: QFN
• No. Of Pins: 64
• Supply Voltage Range: 1.8V To 3.6V
• Operating Temperature Range: -40°C To +85°C
• Svhc: No SVHC (15-Dec-2010)
• Rohs Compliant: Yes
• Processor Series: ATMEGA128x
• Core: AVR8
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 128 KB
• Data Ram Size: 16 KB
• Interface Type: JTAG
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 38
• Number Of Timers: 6
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVR128RFA1-EK1
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

14.4.8 DDRD – Port D Data Direction Register
14.4.9 PIND – Port D Input Pins Address
14.4.10 PORTE – Port E Data Register
14.4.11 DDRE – Port E Data Direction Register
8266A-MCU Wireless-12/09
The DDDn bit in the DDRD Register selects the direction of the PORTD pin n. If DDDn
is written logic one, PDn is configured as an output pin. If DDDn is written logic zero,
PDn is configured as an input pin.
• Bit 7:0 – DDD7:0 - Port D Data Direction Register Value
This register allows access to the PORTD pins independent of the setting of the Data
Direction bit DDDn. The port pin can be read through the PINDn Register bit, and
writing a logic one to PINDn toggles the value of PORTDn.
• Bit 7:0 – PIND7:0 - Port D Input Pins Value
If PORTEn is written logic one when the PORTE pin n is configured as an input pin, the
pull-up resistor is activated. To switch the pull-up resistor off, PORTEn has to be written
logic zero or the pin has to be configured as an output pin. If PORTEn is written logic
one when the pin is configured as an output pin, the port pin is driven high (one). If
PORTEn is written logic zero when the pin is configured as an output pin, the port pin is
driven low (zero).
• Bit 7:0 – PORTE7:0 - Port E Data Register Value
Bit
$0A ($2A)
Read/Write
Initial Value
Bit
$09 ($29)
Read/Write
Initial Value
Bit
$0E ($2E)
Read/Write
Initial Value
Bit
$0D ($2D)
Read/Write
Initial Value
DDD7
RW
DDE7
RW
RW
R
7
0
7
0
7
0
7
0
RW
R
DDD6
6
0
6
0
DDE6
RW
RW
6
0
6
0
RW
R
5
0
5
0
DDD5
DDE5
RW
RW
5
0
5
0
RW
R
4
0
4
0
PORTE7:0
PIND7:0
DDD4
DDE4
RW
RW
4
0
4
0
RW
R
3
0
3
0
DDD3
DDE3
RW
RW
3
0
3
0
RW
R
2
0
2
0
ATmega128RFA1
DDD2
DDE2
RW
RW
2
0
2
0
RW
R
1
0
1
0
DDD1
DDE1
RW
RW
RW
R
0
0
1
0
1
0
0
0
DDD0
DDE0
RW
RW
0
0
0
0
PORTE
PIND
DDRD
DDRE
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