XC912BC32CFU8 Motorola Semiconductor Products, XC912BC32CFU8 Datasheet - Page 102
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XC912BC32CFU8
Manufacturer Part Number
XC912BC32CFU8
Description
M68HC12B Family Data Sheet
Manufacturer
Motorola Semiconductor Products
Datasheet
1.XC912BC32CFU8.pdf
(362 pages)
- Current page: 102 of 362
- Download datasheet (5Mb)
EEPROM
7.3.4 EEPROM Control Register
Data Sheet
102
BULKP — Bulk Erase Protection Bit
BYTE — Byte and Aligned Word Erase Bit
ROW — Row or Bulk Erase Bit (when BYTE = 0)
If BYTE = 1 and test mode is not enabled, only the location specified by the address
written to the programming latches will be erased. The operation will be a byte or
an aligned word erase depending on the size of written data.
ERASE — Erase Control Bit
Read anytime. Write anytime if EEPGM = 0 and PROTLCK = 0.
Read anytime. Write anytime if EEPGM = 0.
Read anytime. Write anytime if EEPGM = 0.
BYTE and ROW have no effect when ERASE = 0.
Read anytime. Write anytime if EEPGM = 0.
Configures the EEPROM for erasure or programming.
When test mode is not enabled and unless BULKP is set, erasure is by byte,
aligned word, row, or bulk.
Address: $00F3
0 = EEPROM can be bulk erased.
1 = EEPROM is protected from being bulk or row erased.
0 = Bulk or row erase is enabled.
1 = One byte or one aligned word erase only
0 = Erase entire EEPROM array.
1 = Erase only one 32-byte row.
0 = EEPROM configuration for programming or reading
1 = EEPROM configuration for erasure
Reset:
Read:
Write:
BYTE
0
0
1
1
BULKP
Bit 7
Figure 7-5. EEPROM Control Register (EEPROG)
1
6
0
0
ROW
EEPROM
0
1
0
1
Table 7-2. Erase Selection
5
0
0
BYTE
4
0
Bulk erase entire EEPROM array
Byte or aligned word erase
Byte or aligned word erase
ROW
Row erase 32 bytes
3
0
Block Size
M68HC12B Family — Rev. 8.0
ERASE
2
0
EELAT
1
0
MOTOROLA
EEPGM
Bit 0
0
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