XC912BC32CFU8 Motorola Semiconductor Products, XC912BC32CFU8 Datasheet - Page 242

• Manufacturer Part Number: XC912BC32CFU8
• Description: M68HC12B Family Data Sheet
• Manufacturer: Motorola Semiconductor Products

Byte Data Link Communications (BDLC)
15.7.4.5 Valid EOF and IFS Symbols
15.7.4.6 Idle Bus
Data Sheet
242
In
symbol of the next message occurs between A and B, the current symbol is
considered a valid end-of-frame (EOF) symbol.
See
symbol of the next message occurs between C and D, the current symbol is
considered a valid EOF symbol followed by a valid inter-frame separation symbol
(IFS). All nodes must wait until a valid IFS symbol time has expired before
beginning transmission. However, due to variations in clock frequencies and bus
loading, some nodes may recognize a valid IFS symbol before others and
immediately begin transmitting. Therefore, any time a node waiting to transmit
detects a passive-to-active transition once a valid EOF has been detected, it
should immediately begin transmission, initiating the arbitration process.
In
start-of-frame (SOF) symbol of the next message does not occur before D, the bus
is considered to be idle, and any node wishing to transmit a message may do so
immediately.
Figure
Figure
PASSIVE
PASSIVE
PASSIVE
PASSIVE
Figure
ACTIVE
ACTIVE
ACTIVE
ACTIVE
15-7(1), if the passive-to-active received transition beginning the SOF
15-7(2), if the passive-to-active received transition beginning the
Figure 15-8. J1850 VPW Received Active Symbol Times
15-7(2). If the passive-to-active received transition beginning the SOF
Byte Data Link Communications (BDLC)
64 µs
A
A
128 µs
200 µs
B
B
C
C
M68HC12B Family — Rev. 8.0
D
(1) INVALID ACTIVE BIT
(2) VALID ACTIVE LOGIC 1
(3) VALID ACTIVE LOGIC 0
(4) VALID SOF SYMBOL
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