XC912BC32CFU8 Motorola Semiconductor Products, XC912BC32CFU8 Datasheet - Page 294

• Manufacturer Part Number: XC912BC32CFU8
• Description: M68HC12B Family Data Sheet
• Manufacturer: Motorola Semiconductor Products

msCAN12 Controller
16.12.9 msCAN12 Identifier Acceptance Control Register
Data Sheet
294
NOTE:
IDAM1 and IDAM0— Identifier Acceptance Mode Flags
IDHIT2–IDHIT0— Identifier Acceptance Hit Indicator Flags
The IDHIT indicators are always related to the message in the foreground buffer.
When a message gets copied from the background to the foreground buffer, the
indicators are updated as well.
The CIDAC register can be written only if the SFTRES bit in CMCR0 is set.
The CPU sets these flags to define the identifier acceptance filter organization.
See
settings. In filter closed mode, no messages are accepted so that the
foreground buffer is never reloaded.
The msCAN12 sets these flags to indicate an identifier acceptance hit. See
16.4 Identifier Acceptance
Address: $0108
Reset:
Read:
Write:
16.4 Identifier Acceptance
IDHIT2
Bit 7
IDAM1
0
0
0
0
0
0
1
1
1
1
0
0
1
1
Table 16-10. Identifier Acceptance Hit Indication
Table 16-9. Identifier Acceptance Mode Settings
Figure 16-24. msCAN12 Identifier Acceptance
= Unimplemented
msCAN12 Controller
IDHIT1
6
0
0
0
0
1
1
0
0
1
1
IDAM0
Control Register (CIDAC)
0
1
0
1
IDAM1
Filter. Table 16-8 summarizes the different settings.
5
0
IDHIT0
Filter. Table 16-8 summarizes the different
0
1
0
1
0
1
0
1
IDAM0
4
0
Identifier Acceptance Mode
Four 16-bit acceptance filters
Two 32-bit acceptance filters
Eight 8-bit acceptance filters
Identifier Acceptance Hit
Filter closed
3
0
0
Filter 0 hit
Filter 1 hit
Filter 2 hit
Filter 3 hit
Filter 4 hit
Filter 5 hit
Filter 6 hit
Filter 7 hit
IDHIT2
M68HC12B Family — Rev. 8.0
2
0
IDHIT1
1
0
MOTOROLA
IDHIT0
Bit 0
0