XC912BC32CFU8 Motorola Semiconductor Products, XC912BC32CFU8 Datasheet - Page 37
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XC912BC32CFU8
Manufacturer Part Number
XC912BC32CFU8
Description
M68HC12B Family Data Sheet
Manufacturer
Motorola Semiconductor Products
Datasheet
1.XC912BC32CFU8.pdf
(362 pages)
- Current page: 37 of 362
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1.6.4.8 Port T
1.6.4.9 Port S
1.6.5 Port Pullup, Pulldown, and Reduced Drive
M68HC12B Family — Rev. 8.0
MOTOROLA
This port provides eight general-purpose I/O pins when not enabled for input
capture and output compare in the timer and pulse accumulator subsystem. The
TEN bit in the timer system control register (TSCR) enables the timer function. The
pulse accumulator subsystem is enabled with the PAEN bit in the pulse
accumulator control register (PACTL).
The port T data direction register (DDRT) determines pin direction of port T when
used for general-purpose I/O. When DDRT bits are set, the corresponding pin is
configured for output. On reset the DDRT bits are cleared and the corresponding
pin is configured for input.
When the PUPT bit in the timer mask register 2 (TMSK2) is set, all input pins are
pulled up internally by an active pullup device. Pullups are disabled after reset.
Setting the RDPT bit in the TMSK2 register configures all port T outputs to have
reduced drive levels. Levels are at normal drive capability after reset. The TMSK2
register can be read or written anytime after reset. For the MC68HC912B32 and
MC68HC(9)12BC32, refer to
MC68HC12BE32, refer to
Port S is the 8-bit interface to the standard serial interface consisting of the serial
communications interface (SCI) and serial peripheral interface (SPI) subsystems.
Port S pins are available for general-purpose parallel I/O when standard serial
functions are not enabled.
Port S pins serve several functions depending on the various internal control
registers. If WOMS bit in the SCI control register 1 (SC0CR1) is set, the P-channel
drivers of the output buffers are disabled for bits 0–1 (2–3). If SWOM bit in the
SP0CR1 register is set, the P-channel drivers of the output buffers are disabled for
bits 4–7 (wired-OR mode). The open drain control affects both the serial and the
general-purpose outputs. If the RDPSx bits in the PURDS register are set, the
appropriate port S pin drive capabilities are reduced. If PUPSx bits in the port S
pullup, reduced drive register (PURDS) are set, the appropriate pullup device is
connected to each port S pin which is programmed as a general-purpose input. If
the pin is programmed as a general-purpose output, the pullup is disconnected
from the pin regardless of the state of the individual PUPSx bits.
MCU ports can be configured for internal pullup. To reduce power consumption
and RFI, the pin output drivers can be configured to operate at a reduced drive
level. Reduced drive causes a slight increase in transition time depending on
loading and should be used only for ports which have a light loading.
summarizes the port pullup default status and controls.
General Description
Section 13. Enhanced Capture Timer (ECT)
Section 12. Standard Timer Module
Pinout and Signal Descriptions
General Description
(TIM). For the
Table 1-5
Data Sheet
Module.
37
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