XC912BC32CFU8 Motorola Semiconductor Products, XC912BC32CFU8 Datasheet - Page 124
XC912BC32CFU8
Manufacturer Part Number
XC912BC32CFU8
Description
M68HC12B Family Data Sheet
Manufacturer
Motorola Semiconductor Products
Datasheet
1.XC912BC32CFU8.pdf
(362 pages)
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Clock Generation Module (CGM)
10.7.2 Real-Time Interrupt Control Register
Data Sheet
124
Read: Anytime
Write: Varies on a bit-by-bit basis
RTIE — Real-Time Interrupt Enable Bit
RSWAI — RTI and COP Stop While in Wait Bit
RSBCK — RTI and COP Stop While in Background Debug Mode Bit
RTBYP — Real-Time Interrupt Divider Chain Bypass Bit
RTR2, RTR1, and RTR0 — Real-Time Interrupt Rate Select Bits
Write anytime.
Write once in normal modes, anytime in special modes.
Write once in normal modes, anytime in special modes.
Write is not allowed in normal modes, anytime in special modes.
Write anytime.
Rate select for real-time interrupt. The E clock is used for this module.
Address: $0014
Reset:
Read:
Write:
0 = Interrupt requests from RTI are disabled.
1 = Interrupt is requested when RTI is set.
0 = Allows the RTI and COP to continue running in wait
1 = Disables both the RTI and COP when the part goes into wait
0 = Allows the RTI and COP to continue running while in background mode
1 = Disables RTI and COP when the part is in background mode (useful for
0 = Divider chain functions normally.
1 = Divider chain is bypassed, allows faster testing. The divider chain is
Figure 10-6. Real-Time Interrupt Control Register (RTICTL)
emulation)
normally P divided by 2
RTIE
Bit 7
0
Clock Generation Module (CGM)
= Unimplemented
RSWAI
6
0
RSBCK
5
0
13
, when bypass becomes P divided by 4.
4
0
0
RTBYP
3
0
M68HC12B Family — Rev. 8.0
RTR2
2
0
RTR1
1
0
MOTOROLA
RTR0
Bit 0
0
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