XC912BC32CFU8 Motorola Semiconductor Products, XC912BC32CFU8 Datasheet - Page 162
XC912BC32CFU8
Manufacturer Part Number
XC912BC32CFU8
Description
M68HC12B Family Data Sheet
Manufacturer
Motorola Semiconductor Products
Datasheet
1.XC912BC32CFU8.pdf
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Standard Timer Module (TIM)
Data Sheet
162
PEDGE — Pulse Accumulator Edge Control Bit
CLK1 and CLK0 — Clock Select Bits
PAOVI — Pulse Accumulator Overflow Interrupt Enable Bit
PAI — Pulse Accumulator Input Interrupt Enable Bit
For PAMOD = 0 (event counter mode)
For PAMOD = 1 (gated time accumulation mode)
If the timer is not active (TEN = 0 in TSCR), there is no ÷64 clock since the E ÷
64 clock is generated by the timer prescaler.
If the pulse accumulator is disabled (PAEN = 0), the prescaler clock from the
timer is always used as an input clock to the timer counter. The change from one
selected clock to the other happens immediately after these bits are written.
0 = Falling edges on the pulse accumulator input pin (PT7/PAI) cause the
1 = Rising edges on the pulse accumulator input pin cause the count to be
0 = Pulse accumulator input pin high enables E ÷ 64 clock to pulse
1 = Pulse accumulator input pin low enables E ÷ 64 clock to pulse
0 = Interrupt inhibited
1 = Interrupt requested if PAOVF is set
0 = Interrupt inhibited
1 = Interrupt requested if PAIF is set
CLK1
count to be incremented.
incremented.
accumulator and the trailing falling edge on the pulse accumulator input
pin sets the PAIF flag.
accumulator and the trailing rising edge on the pulse accumulator input
pin sets the PAIF flag.
0
0
1
1
CLK0
Standard Timer Module (TIM)
0
1
0
1
Use timer prescaler clock as timer counter clock
Use PACLK as input to timer counter clock
Use PACLK/256 as timer counter clock frequency
Use PACLK/65536 as timer counter clock frequency
Table 12-4. Clock Selection
Selected Clock
M68HC12B Family — Rev. 8.0
MOTOROLA
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