XC912BC32CFU8 Motorola Semiconductor Products, XC912BC32CFU8 Datasheet - Page 244

• Manufacturer Part Number: XC912BC32CFU8
• Description: M68HC12B Family Data Sheet
• Manufacturer: Motorola Semiconductor Products

Byte Data Link Communications (BDLC)
15.7.5 Message Arbitration
Data Sheet
244
TRANSMITTER A
TRANSMITTER B
J1850 BUS
PASSIVE
PASSIVE
PASSIVE
ACTIVE
ACTIVE
ACTIVE
Message arbitration on the J1850 bus is accomplished in a non-destructive
manner, allowing the message with the highest priority to be transmitted, while any
transmitters which lose arbitration simply stop transmitting and wait for an idle bus
to begin transmitting again.
If the BDLC wants to transmit onto the J1850 bus, but detects that another
message is in progress, it waits until the bus is idle. However, if multiple nodes
begin to transmit in the same synchronization window, message arbitration occurs
beginning with the first bit after the SOF symbol and continues with each bit
thereafter. If a write to the BDR (for instance, to initiate transmission) occurred on
or before
104 • t
for the bus. If a CPU write to the BDR occurred after
104 • t
but waits for the next IFS period to expire before attempting to transmit the byte.
The variable pulse-width modulation (VPW) symbols and J1850 bus electrical
characteristics are chosen carefully so that a logic 0 (active or passive type) always
dominates over a logic 1 (active or passive type) simultaneously transmitted.
Hence, logic 0s are said to be dominant and logic 1s are said to be recessive.
When a node detects a dominant bit on BDRxD when it transmitted a recessive bit,
it loses arbitration and immediately stops transmitting. This is known as bitwise
arbitration (see
Since a logic 0 dominates a logic 1, the message with the lowest value has the
highest priority and always wins arbitration. For instance, a message with priority
000 wins arbitration over a message with priority 011.
Figure 15-10. J1850 VPW Bitwise Arbitrations
BDLC
BDLC
SOF
from the detection of the rising edge, then the BDLC does not transmit,
from the received rising edge, then the BDLC transmits and arbitrates
Byte Data Link Communications (BDLC)
Figure
DATA
BIT 1
0
0
0
15-10).
DATA
BIT 2
1
1
1
DATA
BIT 3
1
1
1
1
DATA
BIT 4
0
0
DATA
BIT 5
0
0
TRANSMITTER A DETECTS
AN ACTIVE STATE ON
THE BUS AND STOPS
M68HC12B Family — Rev. 8.0
TRANSMITTING
TRANSMITTER B WINS
ARBITRATION AND
TRANSMITTING
CONTINUES
MOTOROLA