XC912BC32CFU8 Motorola Semiconductor Products, XC912BC32CFU8 Datasheet - Page 241
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XC912BC32CFU8
Manufacturer Part Number
XC912BC32CFU8
Description
M68HC12B Family Data Sheet
Manufacturer
Motorola Semiconductor Products
Datasheet
1.XC912BC32CFU8.pdf
(362 pages)
- Current page: 241 of 362
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15.7.4.1 Invalid Passive Bit
15.7.4.2 Valid Passive Logic 0
15.7.4.3 Valid Passive Logic 1
15.7.4.4 Valid EOD Symbol
M68HC12B Family — Rev. 8.0
MOTOROLA
See
data bit or symbol occurs between the active-to-passive transition beginning the
current data bit (or symbol) and A, the current bit would be invalid.
See
data bit (or symbol) occurs between A and B, the current bit would be considered
a logic 0.
See
data bit (or symbol) occurs between B and C, the current bit would be considered
a logic 1.
See
data bit (or symbol) occurs between C and D, the current symbol would be
considered a valid end-of-data symbol (EOD).
ACTIVE
PASSIVE
ACTIVE
PASSIVE
Figure
Figure
Figure
Figure
Figure 15-7. VPW Received Passive EOF and IFS Symbol Times
15-6(1). If the passive-to-active received transition beginning the next
15-6(2). If the passive-to-active received transition beginning the next
15-6(3). If the passive-to-active received transition beginning the next
15-6(4). If the passive-to-active received transition beginning the next
Byte Data Link Communications (BDLC)
280 µs
300 µs
A
Byte Data Link Communications (BDLC)
B
C
D
BDLC MUX Interface
(1) VALID EOF SYMBOL
(2) VALID EOF+
IFS SYMBOL
Data Sheet
241
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