XC912BC32CFU8 Motorola Semiconductor Products, XC912BC32CFU8 Datasheet - Page 180

• Manufacturer Part Number: XC912BC32CFU8
• Description: M68HC12B Family Data Sheet
• Manufacturer: Motorola Semiconductor Products

Enhanced Capture Timer (ECT) Module
13.4.7 Timer Control Registers
Data Sheet
180
NOTE:
Read: Anytime
Write: Anytime
OMn Bits — Output Mode
OLn Bits — Output Level
To enable output action by OMn and OLn bits on the timer port, the corresponding
bit in OC7M should be cleared.
These eight pairs of control bits are encoded to specify the output action to be
taken as a result of a successful OCn compare (see
OMn or OLn is 1, the pin associated with OCn becomes an output tied to OCn
regardless of the state of the associated DDRT bit.
To operate the 16-bit pulse accumulators A and B (PACA and PACB)
independently of input capture or output compare 7 and 0, respectively, the user
must set the corresponding bits IOSn = 1, OMn = 0, and OLn = 0. OC7M7 or
OC7M0 in the OC7M register must also be cleared.
Address: $0088
Address: $0089
Reset:
Reset:
Read:
Read:
Write:
Write:
OM7
OM3
Bit 7
Bit 7
OMn
Enhanced Capture Timer (ECT) Module
0
0
0
0
1
1
Figure 13-12. Timer Control Register 1 (TCTL1)
Figure 13-13. Timer Control Register 2 (TCTL2)
Table 13-1. Compare Result Output Action
OLn
0
1
0
1
OL7
OL3
6
0
6
0
Timer disconnected from output pin logic
Toggle OCn output line
Clear OCn output line to 0
Set OCn output line to 1
OM6
OM2
5
0
5
0
OL6
OL2
4
0
4
0
Action
OM5
OM1
3
0
3
0
Table
M68HC12B Family — Rev. 8.0
OL5
OL1
2
0
2
0
13-1). When either
OM4
OM0
1
0
1
0
MOTOROLA
Bit 0
Bit 0
OL4
OL0
0
0