XC912BC32CFU8 Motorola Semiconductor Products, XC912BC32CFU8 Datasheet - Page 87

• Manufacturer Part Number: XC912BC32CFU8
• Description: M68HC12B Family Data Sheet
• Manufacturer: Motorola Semiconductor Products

6.1 Introduction
6.2 Detecting Access Type from External Signals
M68HC12B Family — Rev. 8.0
MOTOROLA
Data Sheet — M68HC12B Family
Internally, the MCU has full 16-bit data paths, but depending upon the operating
mode and control registers, the external bus may be eight or 16 bits. There are
cases where 8-bit and 16-bit accesses can appear on adjacent cycles using the
LSTRB signal to indicate 8-bit or 16-bit data.
The external signals LSTRB, R/W, and A0 can be used to determine the type of
bus access that is taking place. Accesses to the internal RAM module are the only
accesses that produce LSTRB = A0 = 1, because the internal RAM is specifically
designed to allow misaligned 16-bit accesses in a single cycle. In these cases, the
data for the address that was accessed is on the low half of the data bus and the
data for address +1 is on the high half of the data bus (data order is swapped).
LSTRB
1
0
1
0
0
1
0
1
A0
0
1
0
1
0
1
0
1
Bus Control and Input/Output (I/O)
Section 6. Bus Control and Input/Output (I/O)
R/W
1
1
0
0
1
1
0
0
Table 6-1. Detecting Access Type
8-bit read of an even address
8-bit read of an odd address
8-bit write to an even address
8-bit write to an odd address
16-bit read of an even address
16-bit read of an odd address (low/high data swapped)
16-bit write to an even address
16-bit write to an odd address (low/high data swapped)
Type of Access
Data Sheet
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