XC912BC32CFU8 Motorola Semiconductor Products, XC912BC32CFU8 Datasheet - Page 83
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XC912BC32CFU8
Manufacturer Part Number
XC912BC32CFU8
Description
M68HC12B Family Data Sheet
Manufacturer
Motorola Semiconductor Products
Datasheet
1.XC912BC32CFU8.pdf
(362 pages)
- Current page: 83 of 362
- Download datasheet (5Mb)
5.4.3 RAM Initialization Register
5.4.4 EEPROM Initialization Register
M68HC12B Family — Rev. 8.0
MOTOROLA
MMSWAI — Memory Mapping Interface Stop in Wait Control Bit
After reset, addresses of the 1-Kbyte RAM array begin at location $0800 but can
be assigned to any 2-Kbyte boundary within the standard 64-Kbyte address space.
Mapping of internal RAM is controlled by five bits in the RAM initialization register
(INITRM). The RAM array occupies the first 1 Kbyte of the 2-Kbyte block.
Read: Anytime
Write: Once in normal modes; anytime in special modes
RAM15–RAM11 — RAM Position Bits
The MCU has 768 bytes of EEPROM which are activated by the EEON bit in the
EEPROM initialization register (INITEE).
Mapping of internal EEPROM is controlled by four bits in the INITEE register. After
reset, EEPROM address space begins at location $0D00 but can be mapped to
any 4-Kbyte boundary within the standard 64-Kbyte address space.
Read: anytime
Write: varies from bit to bit
This bit controls access to the memory mapping interface when in wait mode.
Normal modes: Write anytime
Special modes: Write never
These bits specify the upper five bits of the 16-bit RAM address.
Address: $0010
Address: $0012
Reset:
Reset:
Read:
Read:
Write:
Write:
0 = Memory mapping interface continues to function in wait mode.
1 = Memory mapping interface access shuts down in wait mode.
RAM15
EE15
Bit 7
Bit 7
Operating Modes and Resource Mapping
Figure 5-4. EEPROM Initialization Register (INITEE)
0
0
Figure 5-3. RAM Initialization Register (INITRM)
RAM14
EE14
6
0
6
0
RAM13
EE13
5
0
5
0
RAM12
EE12
4
0
4
0
Operating Modes and Resource Mapping
Mode and Resource Mapping Registers
RAM11
3
1
3
0
0
2
0
0
2
0
0
1
0
0
1
0
0
Data Sheet
EEON
Bit 0
Bit 0
0
0
1
83
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