XC912BC32CFU8 Motorola Semiconductor Products, XC912BC32CFU8 Datasheet - Page 116

• Manufacturer Part Number: XC912BC32CFU8
• Description: M68HC12B Family Data Sheet
• Manufacturer: Motorola Semiconductor Products

FLASH EEPROM
8.7 Program/Erase Protection Interlocks
8.8 Stop or Wait Mode
8.9 Test Mode
Data Sheet
116
NOTE:
The FLASH EEPROM program and erase mechanisms provide maximum
protection from accidental programming or erasure.
The voltage required to program/erase the FLASH EEPROM (V
an external pin. If V
Furthermore, the program/erase voltage will not be applied to the FLASH
EEPROM unless turned on by setting a control bit (ENPE). The ENPE bit may not
be set unless the programming address and data latches have been written
previously with a valid address. The latches may not be written unless enabled by
setting a control bit (LAT). The LAT and ENPE control bits must be written on
separate writes to the control register (FEECTL) and must be separated by a write
to the programming latches. The ERAS and LAT bits are also protected when
ENPE is set. This prevents inadvertent switching between erase/program mode
and also prevents the latched data and address from being changed after a
program cycle has been initiated.
When STOP or WAIT commands are executed, the MCU puts the FLASH
EEPROM in stop or wait mode. In these modes, the FLASH module will cease
erasure or programming immediately.
It is advised to not enter stop or wait modes when programming the FLASH array.
The FLASH EEPROM module is not able to recover from stop mode without a
250-ns delay. If the operating bus frequency is greater than 4 MHz, the DLY bit
must be set to1 to use the FLASH after recovering from stop mode. Other options
are to map the EEPROM module over the FLASH module in the memory map with
DLY = 0 and place the interrupt vectors in the EEPROM array or use reset to
recover from a stop mode executed from FLASH EEPROM. Recovery from a
STOP instruction executed from EEPROM and RAM operates normally.
The FLASH EEPROM has some special test functions which are only accessible
when the device is in test mode. Test mode is indicated to the FLASH EEPROM
module when the SMOD line on the LIB is asserted. When SMOD is asserted, the
special test control bits may be accessed via the LIB to invoke the special test
functions in the FLASH EEPROM module. When SMOD is not asserted, writes to
the test control bits have no effect and all bits in the test register FEETST will be
cleared. This ensures that FLASH EEPROM test mode cannot be invoked
inadvertently during normal operation.
The FLASH EEPROM module will operate normally, even if SMOD is asserted,
until a special test function is invoked. The test mode adds additional features over
normal mode. These features allow the tests to be performed even after the device
is installed in the final product.
FP
is not present, no programming/erasing will occur.
FLASH EEPROM
M68HC12B Family — Rev. 8.0
FP
) is supplied via
MOTOROLA