XC912BC32CFU8 Motorola Semiconductor Products, XC912BC32CFU8 Datasheet - Page 182

no-image

XC912BC32CFU8

Manufacturer Part Number
XC912BC32CFU8
Description
M68HC12B Family Data Sheet
Manufacturer
Motorola Semiconductor Products
Datasheet
Enhanced Capture Timer (ECT) Module
13.4.8 Timer Interrupt Mask Registers
Data Sheet
182
Read: Anytime
Write: Anytime
C7I–C0I — Input Capture/Output Compare x Interrupt Enable Bits
Read: Anytime
Write: Anytime
TOI — Timer Overflow Interrupt Enable Bit
PUPT — Timer Port Pullup Resistor Enable Bit
RDPT — Timer Port Drive Reduction Bit
TCRE — Timer Counter Reset Enable Bit
The bits in TMSK1 correspond bit-for-bit with the bits in the TFLG1 status
register. If cleared, the corresponding flag is disabled from causing a hardware
interrupt. If set, the corresponding flag is enabled to cause a hardware interrupt.
This enable bit controls pullup resistors on the timer port pins when the pins are
configured as inputs.
This bit reduces the effective output driver size which can reduce power supply
current and generated noise depending upon pin loading.
This bit allows the timer counter to be reset by a successful output compare 7
event. This mode of operation is similar to an up-counting modulus counter.
Address: $008C
Address: $008D
Reset:
Reset:
Read:
Read:
Write:
Write:
0 = Interrupt inhibited
1 = Hardware interrupt requested when TOF flag set
0 = Disable pullup resistor function
1 = Enable pullup resistor function
0 = Normal output drive capability
1 = Enable output drive reduction function
0 = Counter reset inhibited and counter runs free
1 = Counter reset by a successful output compare 7
Figure 13-16. Timer Interrupt Mask 1 Register (TMSK1)
Figure 13-17. Timer Interrupt Mask 2 Register (TMSK2)
Bit 7
Bit 7
C7I
TOI
Enhanced Capture Timer (ECT) Module
0
0
C6I
6
0
6
0
0
PUPT
C5I
5
0
5
0
RDPT
C4I
4
0
4
0
TCRE
C3I
3
0
3
0
M68HC12B Family — Rev. 8.0
PR2
C2I
2
0
2
0
PR1
C1I
1
0
1
0
MOTOROLA
Bit 0
Bit 0
PR0
C0I
0
0

Related parts for XC912BC32CFU8