XC912BC32CFU8 Motorola Semiconductor Products, XC912BC32CFU8 Datasheet - Page 312

• Manufacturer Part Number: XC912BC32CFU8
• Description: M68HC12B Family Data Sheet
• Manufacturer: Motorola Semiconductor Products

Analog-to-Digital Converter (ATD)
17.4 ATD Mode Operation
Data Sheet
312
ADRx0L:
ADRx1L:
ADRx2L:
ADRx3L:
ADRx4L:
ADRx5L:
ADRx6L:
ADRx7L:
Read: Anytime
Write: Has no meaning or effect
ADRxH[15:8]–ADRxH[7:0] — ATD Conversion Result Bits
Stop
Wait
BDM
User
ADPU
Reset:
Read:
Write:
The reset condition for these registers is undefined.
These bits contain the left-justified, unsigned result from the ATD conversion.
The channel from which this result was obtained is dependant on the conversion
mode selected. These registers are always read-only in normal mode.
Causes all clocks to halt (if the S bit in the CCR is 0). The system is placed in a
minimum-power standby mode. This aborts any conversion sequence in
progress. During STOP recovery, the ATD must delay for the STOP recovery
time (t
ATD conversion continues unless the AWAI bit in ATDCTL2 register is set.
Debug options available as set in register ATDCTL3.
ATD continues running unless ADPU is cleared.
ATD operations are stopped if ADPU = 0, but registers are accessible.
$0071
$0073
$0075
$0077
$0079
$007B
$007D
$007F
SR
Bit 7
Bit 7
) before initiating a new ATD conversion sequence.
Analog-to-Digital Converter (ATD)
= Unimplemented
Figure 17-12. ATD Result Registers Low
Bit 6
6
Bit 5
5
Bit 4
4
Undefined
Bit 3
3
Bit 2
2
M68HC12B Family — Rev. 8.0
Bit 1
1
MOTOROLA
Bit 0
Bit 0