XC912BC32CFU8 Motorola Semiconductor Products, XC912BC32CFU8 Datasheet - Page 229
XC912BC32CFU8
Manufacturer Part Number
XC912BC32CFU8
Description
M68HC12B Family Data Sheet
Manufacturer
Motorola Semiconductor Products
Datasheet
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15.4 BDLC Operating Modes
15.4.1 Power Off Mode
15.4.2 Reset Mode
M68HC12B Family — Rev. 8.0
MOTOROLA
The BDLC has five main modes of operation which interact with the power
supplies, pins, and rest of the MCU as shown in
For guaranteed BDLC operation, this mode is entered from reset mode when the
BDLC supply voltage, V
placed in reset mode by low-voltage reset (LVR) before being powered down. In
power off mode, the pin input and output specifications are not guaranteed.
This mode is entered from power off mode when the BDLC supply voltage, V
rises above its minimum specified value (V
asserted. The internal MCU reset must be asserted while powering up the BDLC
or an unknown state is entered and correct operation cannot be guaranteed. Reset
mode is also entered from any other mode when any reset source is asserted.
NETWORK ACTIVITY OR
OTHER MCU WAKEUP
BDLC STOP
(COP, ILLADDR, PU, RESET, LVR, POR)
ANY MCU RESET SOURCE ASSERTED
Byte Data Link Communications (BDLC)
Figure 15-2. BDLC Operating Modes State Diagram
V
DD
STOP INSTRUCTION OR
WAIT INSTRUCTION AND WCM = 1
≤ V
FROM ANY MODE
DD
(MINIMUM)
DD
, drops below its minimum specified value. The BDLC is
POWER OFF
RESET
RUN
DD
Byte Data Link Communications (BDLC)
–10%) and an MCU reset source is
V
ANY MCU RESET SOURCE ASSERTED
Figure
DD
NO MCU RESET SOURCE ASSERTED
WAIT INSTRUCTION AND WCM = 0
> V
DD
(MINIMUM) AND
15-2.
NETWORK ACTIVITY OR
OTHER MCU WAKEUP
BDLC Operating Modes
BDLC WAIT
Data Sheet
DD
229
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