XC912BC32CFU8 Motorola Semiconductor Products, XC912BC32CFU8 Datasheet - Page 218

• Manufacturer Part Number: XC912BC32CFU8
• Description: M68HC12B Family Data Sheet
• Manufacturer: Motorola Semiconductor Products

Serial Interface
14.3.5.2 SPI Control Register 2
Data Sheet
218
SWOM — Port S Wired-OR Mode Bit
MSTR — SPI Master/Slave Mode Select Bit
CPOL and CPHA — SPI Clock Polarity, Clock Phase Bits
SSOE — Slave Select Output Enable Bit
LSBF — SPI LSB First Enable Bit
Read: Anytime
Write: Anytime
PUPS — Pullup Port S Enable Bit
RDS — Reduce Drive of Port S Bit
SPC0 — Serial Pin Control 0 Bit
Address:
Controls not only SPI output pins but also the general-purpose output pins
(PS4–PS7) which are not used by SPI.
These two bits are used to specify the clock format to be used in SPI operations.
When the clock polarity bit is cleared and data is not being transferred, the SCK
pin of the master device is low. When CPOL is set, SCK idles high. See
14-12
The SS output feature is enabled only in master mode by asserting the SSOE
and DDS7.
Normally, data is transferred MSB first. This bit does not affect the position of
the MSB and LSB in the data register. Reads and writes of the data register
always have MSB in bit 7.
This bit decides serial pin configurations with MSTR control bit.
0 = SPI and/or PS4–PS7 output buffers operate normally.
1 = SPI and/or PS4–PS7 output buffers behave as open-drain outputs.
0 = Slave mode
1 = Master mode
0 = Data is transferred most-significant bit (MSB) first.
1 = Data is transferred least-significant bit (LSB) first.
0 = No internal pullups on port S
1 = All port S input pins have an active pullup device. If a pin is programmed
0 = Port S output drivers operate normally.
1 = All port S output pins have reduced drive capability for lower power and
Reset:
Read:
Write:
and
as output, the pullup device becomes inactive.
less noise.
$00D1
Figure
Bit 7
0
0
Figure 14-16. SPI Control Register 2 (SP0CR2)
= Unimplemented
14-13.
Serial Interface
6
0
0
5
0
0
4
0
0
PUPS
3
1
M68HC12B Family — Rev. 8.0
RDS
2
0
1
0
0
MOTOROLA
Figure
SPC0
Bit 0
0