XC912BC32CFU8 Motorola Semiconductor Products, XC912BC32CFU8 Datasheet - Page 304

• Manufacturer Part Number: XC912BC32CFU8
• Description: M68HC12B Family Data Sheet
• Manufacturer: Motorola Semiconductor Products

Analog-to-Digital Converter (ATD)
17.3.4 ADT Control Register 3
Data Sheet
304
NOTE:
The ATD control register 2 (ATDCTL2) is used to select the power-up mode,
interrupt control, and freeze control.
Writing to this register aborts the current conversion sequence.
ADPU — ATD Disable Bit
AFFC — ATD Fast Flag Clear Bit
AWAI — ATD Stop in Wait Mode Bit
ASCIE — ATD Sequence Complete Interrupt Enable Bit
ASCIF — ATD Sequence Complete Interrupt Flag
Read: Anytime
Write: Anytime
Software can disable the clock signal to the ATD and power down the analog
circuits to reduce power consumption. When reset to 0, the ADPU bit aborts any
conversion sequence in progress. Because the bias currents to the analog
circuits are turned off, the ATD requires a period of recovery time to stabilize the
analog circuits after setting the ADPU bit.
Cannot be written in any mode.
Address: $0063
Reset:
Read:
Write:
0 = Disables the ATD, including the analog section for reduction in power
1 = Allows the ATD to function normally
0 = ATD flag clearing operates normally (read the status register before
1 = Changes all ATD conversion complete flags to a fast clear sequence. Any
0 = ATD continues to run when the MCU is in wait mode.
1 = ATD stops to save power when the MCU is in wait mode.
0 = Disables ATD interrupt
1 = Enables ATD interrupt on sequence complete
0 = No ATD interrupt occurred
1 = ATD sequence complete
consumption
reading the result register to clear the associated CCF bit).
access to a result register (ATD0–ATD7) will cause the associated CCF
flag to clear automatically if it was set at the time.
Bit 7
0
0
Figure 17-5. ATD Control Register 3 (ATDCTL3)
Analog-to-Digital Converter (ATD)
= Unimplemented
6
0
0
5
0
0
4
0
0
3
0
0
M68HC12B Family — Rev. 8.0
2
0
0
FRZ1
1
0
MOTOROLA
FRZ0
Bit 0
0