XC912BC32CFU8 Motorola Semiconductor Products, XC912BC32CFU8 Datasheet - Page 111
XC912BC32CFU8
Manufacturer Part Number
XC912BC32CFU8
Description
M68HC12B Family Data Sheet
Manufacturer
Motorola Semiconductor Products
Datasheet
1.XC912BC32CFU8.pdf
(362 pages)
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M68HC12B Family — Rev. 8.0
MOTOROLA
NOTE:
array write cycle must be either to the location that is to be programmed if a
programming sequence is being performed, or, if erasing, to any valid FLASH
EEPROM array location. Writing the new address and data information to the
FLASH EEPROM is followed by assertion of ENPE to turn on the program/erase
voltage to program/erase the new location(s). The LAT bit must be asserted and
the address and data latched to allow the setting of the ENPE control bit. If the data
and address have not been latched, an attempt to assert ENPE will be ignored and
ENPE will remain negated after the write cycle to FEECTL is completed. The LAT
bit must remain asserted and the ERAS bit must remain in its current state as long
as ENPE is asserted. A write to the LAT bit to clear it while ENPE is set will be
ignored. That is, after the write cycle, LAT will remain asserted. Likewise, an
attempt to change the state of ERAS will be ignored and the state of the ERAS bit
will remain unchanged.
The programming software is responsible for all timing during a program sequence.
This includes the total number of program pulses (n
pulse (t
the high voltage and verifying the operation (t
The erase software is responsible for all timing during an erase sequence. This
includes the total number of erase pulses (e
(t
high voltage and verifying the operation (t
Software also controls the supply of the proper program/erase voltage to the V
pin and should be at the proper level before ENPE is set during a program/erase
sequence.
A program/erase cycle should not be in progress when starting another
program/erase or while attempting to read from the array.
Although clearing ENPE disables the program/erase voltage (V
to the array, care must be taken to ensure that V
programming/erasing is not in progress. Not doing so could damage the part.
Ensuring that V
controlling the V
Alternatively, all programming and erasing can be done prior to installing the device
on an application circuit board which can always connect V
can also be accomplished by plugging the board into a special programming fixture
which provides program/erase voltage to the V
EPULSE
PPULSE
), the erase margin pulse or pulses, and the delay between turning off the
), the program margin pulses (p
FP
FP
is always greater or equal to V
power supply with the programming software via an output pin.
FLASH EEPROM
VERASE
m
VPROG
m
), the length of the erase pulse
FP
) and the delay between turning off
FP
).
DD
pin.
PP
is at V
).
can be accomplished by
), the length of the program
FP
DD
to V
whenever
FP
DD
) from the V
FLASH EEPROM
. Programming
Data Sheet
Operation
FP
pin
FP
111
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