XC912BC32CFU8 Motorola Semiconductor Products, XC912BC32CFU8 Datasheet - Page 259

• Manufacturer Part Number: XC912BC32CFU8
• Description: M68HC12B Family Data Sheet
• Manufacturer: Motorola Semiconductor Products

15.9.5 BDLC Analog Roundtrip Delay Register
M68HC12B Family — Rev. 8.0
MOTOROLA
NOTE:
Read: Anytime
Write: Once in normal modes or anytime in special mode
BARD programs the BDLC to compensate for various delays of external
transceivers.
ATE — Analog Transceiver Enable Bit
This device does not contain an on-board transceiver; ATE should be cleared for
proper operation.
RXPOL — Receive Pin Polarity Bit
BO3–BO0 — BARD Offset Bits
The ATE bit is used to select either the on-board or an off-chip analog
transceiver.
This bit selects the polarity of an incoming signal on the receive pin. Some
external analog transceivers invert the receive signal from the J1850 bus before
feeding it back to the digital receive pin.
These bits are used to compensate for the analog transceiver roundtrip delay.
Table 15-5
values.
Address:
Reset:
Read:
Write:
0 = Select off-chip analog transceiver.
1 = Select on-board analog transceiver.
0 = Select inverted polarity, where external transceiver inverts the receive
1 = Select normal/true polarity; true non-inverted signal from J1850 bus, for
Figure 15-17. BDLC Analog Roundtrip Delay Register (BARD)
signal.
example, the external transceiver does not invert the receive signal.
$00FC
Byte Data Link Communications (BDLC)
Bit 7
ATE
1
shows the expected transceiver delay with respect to BARD offset
= Unimplemented
RXPOL
6
1
5
0
0
4
0
0
Byte Data Link Communications (BDLC)
BO3
3
0
BO2
2
1
BO1
BDLC Registers
1
1
Data Sheet
Bit 0
BO0
1
259